]> www.infradead.org Git - users/jedix/linux-maple.git/commitdiff
drm/amdgpu/mes: add mes mapping legacy queue switch
authorJack Xiao <Jack.Xiao@amd.com>
Thu, 22 Aug 2024 10:18:51 +0000 (18:18 +0800)
committerAlex Deucher <alexander.deucher@amd.com>
Thu, 29 Aug 2024 17:41:02 +0000 (13:41 -0400)
For mes11 old firmware has issue to map legacy queue,
add a flag to switch mes to map legacy queue.

Fixes: f9d8c5c7855d ("drm/amdgpu/gfx: enable mes to map legacy queue support")
Reported-by: Andrew Worsley <amworsley@gmail.com>
Link: https://lists.freedesktop.org/archives/amd-gfx/2024-August/112773.html
Signed-off-by: Jack Xiao <Jack.Xiao@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
drivers/gpu/drm/amd/amdgpu/amdgpu_gfx.c
drivers/gpu/drm/amd/amdgpu/amdgpu_mes.h
drivers/gpu/drm/amd/amdgpu/mes_v11_0.c
drivers/gpu/drm/amd/amdgpu/mes_v12_0.c

index b4efeef848de7a96ae0c9df08556e608e5e798cc..b779d47a546a3bfe469ca9d8b8826bb6223b2fd0 100644 (file)
@@ -660,7 +660,7 @@ int amdgpu_gfx_enable_kcq(struct amdgpu_device *adev, int xcc_id)
        uint64_t queue_mask = 0;
        int r, i, j;
 
-       if (adev->enable_mes)
+       if (adev->mes.enable_legacy_queue_map)
                return amdgpu_gfx_mes_enable_kcq(adev, xcc_id);
 
        if (!kiq->pmf || !kiq->pmf->kiq_map_queues || !kiq->pmf->kiq_set_resources)
@@ -722,7 +722,7 @@ int amdgpu_gfx_enable_kgq(struct amdgpu_device *adev, int xcc_id)
 
        amdgpu_device_flush_hdp(adev, NULL);
 
-       if (adev->enable_mes) {
+       if (adev->mes.enable_legacy_queue_map) {
                for (i = 0; i < adev->gfx.num_gfx_rings; i++) {
                        j = i + xcc_id * adev->gfx.num_gfx_rings;
                        r = amdgpu_mes_map_legacy_queue(adev,
index a5b1ea60cac8d6978f5526a5075ace454e3a6131..5475e84b23e6632dae80afcae453a17042df2071 100644 (file)
@@ -75,6 +75,7 @@ struct amdgpu_mes {
 
        uint32_t                        sched_version;
        uint32_t                        kiq_version;
+       bool                            enable_legacy_queue_map;
 
        uint32_t                        total_max_queue;
        uint32_t                        max_doorbell_slices;
index 8edcd85a1261fee9581dd28f8c265d164c48fde1..ebc3cdc602b8bb7f43bbbd888dc53a41934cb12d 100644 (file)
@@ -775,6 +775,28 @@ static void mes_v11_0_free_ucode_buffers(struct amdgpu_device *adev,
                              (void **)&adev->mes.ucode_fw_ptr[pipe]);
 }
 
+static void mes_v11_0_get_fw_version(struct amdgpu_device *adev)
+{
+       int pipe;
+
+       /* get MES scheduler/KIQ versions */
+       mutex_lock(&adev->srbm_mutex);
+
+       for (pipe = 0; pipe < AMDGPU_MAX_MES_PIPES; pipe++) {
+               soc21_grbm_select(adev, 3, pipe, 0, 0);
+
+               if (pipe == AMDGPU_MES_SCHED_PIPE)
+                       adev->mes.sched_version =
+                               RREG32_SOC15(GC, 0, regCP_MES_GP3_LO);
+               else if (pipe == AMDGPU_MES_KIQ_PIPE && adev->enable_mes_kiq)
+                       adev->mes.kiq_version =
+                               RREG32_SOC15(GC, 0, regCP_MES_GP3_LO);
+       }
+
+       soc21_grbm_select(adev, 0, 0, 0, 0);
+       mutex_unlock(&adev->srbm_mutex);
+}
+
 static void mes_v11_0_enable(struct amdgpu_device *adev, bool enable)
 {
        uint64_t ucode_addr;
@@ -1144,18 +1166,6 @@ static int mes_v11_0_queue_init(struct amdgpu_device *adev,
                mes_v11_0_queue_init_register(ring);
        }
 
-       /* get MES scheduler/KIQ versions */
-       mutex_lock(&adev->srbm_mutex);
-       soc21_grbm_select(adev, 3, pipe, 0, 0);
-
-       if (pipe == AMDGPU_MES_SCHED_PIPE)
-               adev->mes.sched_version = RREG32_SOC15(GC, 0, regCP_MES_GP3_LO);
-       else if (pipe == AMDGPU_MES_KIQ_PIPE && adev->enable_mes_kiq)
-               adev->mes.kiq_version = RREG32_SOC15(GC, 0, regCP_MES_GP3_LO);
-
-       soc21_grbm_select(adev, 0, 0, 0, 0);
-       mutex_unlock(&adev->srbm_mutex);
-
        return 0;
 }
 
@@ -1402,15 +1412,24 @@ static int mes_v11_0_kiq_hw_init(struct amdgpu_device *adev)
 
        mes_v11_0_enable(adev, true);
 
+       mes_v11_0_get_fw_version(adev);
+
        mes_v11_0_kiq_setting(&adev->gfx.kiq[0].ring);
 
        r = mes_v11_0_queue_init(adev, AMDGPU_MES_KIQ_PIPE);
        if (r)
                goto failure;
 
-       r = mes_v11_0_hw_init(adev);
-       if (r)
-               goto failure;
+       if ((adev->mes.sched_version & AMDGPU_MES_VERSION_MASK) >= 0x47)
+               adev->mes.enable_legacy_queue_map = true;
+       else
+               adev->mes.enable_legacy_queue_map = false;
+
+       if (adev->mes.enable_legacy_queue_map) {
+               r = mes_v11_0_hw_init(adev);
+               if (r)
+                       goto failure;
+       }
 
        return r;
 
index 47a73f6ae4dae9eb9e07becfd9967fd1e92db369..e499b2857a01e1d2a5635b10133f6da0b6a2d5ea 100644 (file)
@@ -1332,6 +1332,7 @@ static int mes_v12_0_sw_init(void *handle)
        adev->mes.funcs = &mes_v12_0_funcs;
        adev->mes.kiq_hw_init = &mes_v12_0_kiq_hw_init;
        adev->mes.kiq_hw_fini = &mes_v12_0_kiq_hw_fini;
+       adev->mes.enable_legacy_queue_map = true;
 
        adev->mes.event_log_size = AMDGPU_MES_LOG_BUFFER_SIZE;
 
@@ -1488,9 +1489,11 @@ static int mes_v12_0_kiq_hw_init(struct amdgpu_device *adev)
                mes_v12_0_set_hw_resources_1(&adev->mes, AMDGPU_MES_KIQ_PIPE);
        }
 
-       r = mes_v12_0_hw_init(adev);
-       if (r)
-               goto failure;
+       if (adev->mes.enable_legacy_queue_map) {
+               r = mes_v12_0_hw_init(adev);
+               if (r)
+                       goto failure;
+       }
 
        return r;