[Why]
So that we can adjust fclk for debugging purposes.
[How]
Add option to force adjust fclk request to pplib.
Signed-off-by: Hugo Hu <hugo.hu@amd.com>
Reviewed-by: Tony Cheng <Tony.Cheng@amd.com>
Acked-by: Leo Li <sunpeng.li@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
        bool scl_reset_length10;
        bool hdmi20_disable;
        bool skip_detection_link_training;
+       unsigned int force_fclk_khz;
 };
 
 struct dc_debug_data {
 
                        bool safe_to_lower)
 {
        struct dc *dc = clk_mgr->ctx->dc;
+       struct dc_debug_options *debug = &dc->debug;
        struct dc_clocks *new_clocks = &context->bw.dcn.clk;
        struct pp_smu_display_requirement_rv *smu_req_cur =
                        &dc->res_pool->pp_smu_req;
        }
 
        // F Clock
+       if (debug->force_fclk_khz != 0)
+               new_clocks->fclk_khz = debug->force_fclk_khz;
+
        if (should_set_clock(safe_to_lower, new_clocks->fclk_khz, clk_mgr->clks.fclk_khz)) {
                clk_mgr->clks.fclk_khz = new_clocks->fclk_khz;
                smu_req.hard_min_fclk_mhz = new_clocks->fclk_khz / 1000;