drm/amd/display: Change ABM sample rate

[Why]
To get the pixel statistics on every frame, change ABM
sample rate from 2 to 1.

[How]
Change LS, HS and BL sample rate to 1.

Signed-off-by: Po-Ting Chen <robin.chen@amd.com>
Reviewed-by: Anthony Koo <Anthony.Koo@amd.com>
Acked-by: Qingqing Zhuo <Qingqing.Zhuo@amd.com>
Tested-by: Daniel Wheeler <daniel.wheeler@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>

diff --git a/drivers/gpu/drm/amd/display/dc/dce/dmub_abm.c b/drivers/gpu/drm/amd/display/dc/dce/dmub_abm.c
index 453aaa5757bd003b90610dd331b051f858350c16..eb1698d54a482f6e61b42d5a6111ef572faaf4c7 100644 (file)
--- a/drivers/gpu/drm/amd/display/dc/dce/dmub_abm.c
+++ b/drivers/gpu/drm/amd/display/dc/dce/dmub_abm.c
@@ -72,11 +72,11 @@ static void dmub_abm_init(struct abm *abm, uint32_t backlight)
 {
        struct dce_abm *dce_abm = TO_DMUB_ABM(abm);
 
-       REG_WRITE(DC_ABM1_HG_SAMPLE_RATE, 0x103);
-       REG_WRITE(DC_ABM1_HG_SAMPLE_RATE, 0x101);
-       REG_WRITE(DC_ABM1_LS_SAMPLE_RATE, 0x103);
-       REG_WRITE(DC_ABM1_LS_SAMPLE_RATE, 0x101);
-       REG_WRITE(BL1_PWM_BL_UPDATE_SAMPLE_RATE, 0x101);
+       REG_WRITE(DC_ABM1_HG_SAMPLE_RATE, 0x3);
+       REG_WRITE(DC_ABM1_HG_SAMPLE_RATE, 0x1);
+       REG_WRITE(DC_ABM1_LS_SAMPLE_RATE, 0x3);
+       REG_WRITE(DC_ABM1_LS_SAMPLE_RATE, 0x1);
+       REG_WRITE(BL1_PWM_BL_UPDATE_SAMPLE_RATE, 0x1);
 
        REG_SET_3(DC_ABM1_HG_MISC_CTRL, 0,
                        ABM1_HG_NUM_OF_BINS_SEL, 0,