static void rts5249_set_aspm(struct rtsx_pcr *pcr, bool enable)
 {
-       struct rtsx_cr_option *option = &pcr->option;
        u8 val = 0;
 
        if (pcr->aspm_enabled == enable)
                return;
 
-       if (option->dev_aspm_mode == DEV_ASPM_DYNAMIC) {
-               if (enable)
-                       val = pcr->aspm_en;
-               rtsx_pci_update_cfg_byte(pcr,
-                       pcr->pcie_cap + PCI_EXP_LNKCTL,
-                       ASPM_MASK_NEG, val);
-       } else if (option->dev_aspm_mode == DEV_ASPM_BACKDOOR) {
-               u8 mask = FORCE_ASPM_VAL_MASK | FORCE_ASPM_CTL0;
-
-               if (!enable)
-                       val = FORCE_ASPM_CTL0;
-               rtsx_pci_write_register(pcr, ASPM_FORCE_CTL, mask, val);
-       }
+       if (enable)
+               val = pcr->aspm_en;
+       rtsx_pci_update_cfg_byte(pcr, pcr->pcie_cap + PCI_EXP_LNKCTL,
+                                ASPM_MASK_NEG, val);
 
        pcr->aspm_enabled = enable;
 }
        option->ltr_active_latency = LTR_ACTIVE_LATENCY_DEF;
        option->ltr_idle_latency = LTR_IDLE_LATENCY_DEF;
        option->ltr_l1off_latency = LTR_L1OFF_LATENCY_DEF;
-       option->dev_aspm_mode = DEV_ASPM_DYNAMIC;
        option->l1_snooze_delay = L1_SNOOZE_DELAY_DEF;
        option->ltr_l1off_sspwrgate = LTR_L1OFF_SSPWRGATE_5249_DEF;
        option->ltr_l1off_snooze_sspwrgate =
 
 
 static void rts5260_set_aspm(struct rtsx_pcr *pcr, bool enable)
 {
-       struct rtsx_cr_option *option = &pcr->option;
        u8 val = 0;
 
        if (pcr->aspm_enabled == enable)
                return;
 
-       if (option->dev_aspm_mode == DEV_ASPM_DYNAMIC) {
-               if (enable)
-                       val = pcr->aspm_en;
-               rtsx_pci_update_cfg_byte(pcr, pcr->pcie_cap + PCI_EXP_LNKCTL,
-                                        ASPM_MASK_NEG, val);
-       } else if (option->dev_aspm_mode == DEV_ASPM_BACKDOOR) {
-               u8 mask = FORCE_ASPM_VAL_MASK | FORCE_ASPM_CTL0;
-
-               if (!enable)
-                       val = FORCE_ASPM_CTL0;
-               rtsx_pci_write_register(pcr, ASPM_FORCE_CTL, mask, val);
-       }
+       if (enable)
+               val = pcr->aspm_en;
+       rtsx_pci_update_cfg_byte(pcr, pcr->pcie_cap + PCI_EXP_LNKCTL,
+                                ASPM_MASK_NEG, val);
 
        pcr->aspm_enabled = enable;
 }
        option->ltr_active_latency = LTR_ACTIVE_LATENCY_DEF;
        option->ltr_idle_latency = LTR_IDLE_LATENCY_DEF;
        option->ltr_l1off_latency = LTR_L1OFF_LATENCY_DEF;
-       option->dev_aspm_mode = DEV_ASPM_DYNAMIC;
        option->l1_snooze_delay = L1_SNOOZE_DELAY_DEF;
        option->ltr_l1off_sspwrgate = LTR_L1OFF_SSPWRGATE_5250_DEF;
        option->ltr_l1off_snooze_sspwrgate =
 
 
 static void rts5261_enable_aspm(struct rtsx_pcr *pcr, bool enable)
 {
-       struct rtsx_cr_option *option = &pcr->option;
        u8 val = 0;
 
        if (pcr->aspm_enabled == enable)
                return;
 
-       if (option->dev_aspm_mode == DEV_ASPM_DYNAMIC) {
-               val = pcr->aspm_en;
-               rtsx_pci_update_cfg_byte(pcr, pcr->pcie_cap + PCI_EXP_LNKCTL,
-                                        ASPM_MASK_NEG, val);
-       } else if (option->dev_aspm_mode == DEV_ASPM_BACKDOOR) {
-               u8 mask = FORCE_ASPM_VAL_MASK | FORCE_ASPM_CTL0;
-
-               val = FORCE_ASPM_CTL0;
-               val |= (pcr->aspm_en & 0x02);
-               rtsx_pci_write_register(pcr, ASPM_FORCE_CTL, mask, val);
-               val = pcr->aspm_en;
-               rtsx_pci_update_cfg_byte(pcr, pcr->pcie_cap + PCI_EXP_LNKCTL,
-                                        ASPM_MASK_NEG, val);
-       }
+       val = pcr->aspm_en;
+       rtsx_pci_update_cfg_byte(pcr, pcr->pcie_cap + PCI_EXP_LNKCTL,
+                                ASPM_MASK_NEG, val);
        pcr->aspm_enabled = enable;
 
 }
 
 static void rts5261_disable_aspm(struct rtsx_pcr *pcr, bool enable)
 {
-       struct rtsx_cr_option *option = &pcr->option;
        u8 val = 0;
 
        if (pcr->aspm_enabled == enable)
                return;
 
-       if (option->dev_aspm_mode == DEV_ASPM_DYNAMIC) {
-               val = 0;
-               rtsx_pci_update_cfg_byte(pcr, pcr->pcie_cap + PCI_EXP_LNKCTL,
-                                        ASPM_MASK_NEG, val);
-       } else if (option->dev_aspm_mode == DEV_ASPM_BACKDOOR) {
-               u8 mask = FORCE_ASPM_VAL_MASK | FORCE_ASPM_CTL0;
-
-               val = 0;
-               rtsx_pci_update_cfg_byte(pcr, pcr->pcie_cap + PCI_EXP_LNKCTL,
-                                        ASPM_MASK_NEG, val);
-               val = FORCE_ASPM_CTL0;
-               rtsx_pci_write_register(pcr, ASPM_FORCE_CTL, mask, val);
-       }
+       val = 0;
+       rtsx_pci_update_cfg_byte(pcr, pcr->pcie_cap + PCI_EXP_LNKCTL,
+                                ASPM_MASK_NEG, val);
        rtsx_pci_write_register(pcr, SD_CFG1, SD_ASYNC_FIFO_NOT_RST, 0);
        udelay(10);
        pcr->aspm_enabled = enable;
        option->l1_snooze_delay = L1_SNOOZE_DELAY_DEF;
        option->ltr_l1off_sspwrgate = 0x7F;
        option->ltr_l1off_snooze_sspwrgate = 0x78;
-       option->dev_aspm_mode = DEV_ASPM_DYNAMIC;
 
        option->ocp_en = 1;
        hw_param->interrupt_en |= SD_OC_INT_EN;
 
 
 static void rtsx_comm_set_aspm(struct rtsx_pcr *pcr, bool enable)
 {
-       struct rtsx_cr_option *option = &pcr->option;
-
        if (pcr->aspm_enabled == enable)
                return;
 
-       if (option->dev_aspm_mode == DEV_ASPM_DYNAMIC) {
-               if (enable)
-                       rtsx_pci_enable_aspm(pcr);
-               else
-                       rtsx_pci_disable_aspm(pcr);
-       } else if (option->dev_aspm_mode == DEV_ASPM_BACKDOOR) {
-               u8 mask = FORCE_ASPM_VAL_MASK;
-               u8 val = 0;
-
-               if (enable)
-                       val = pcr->aspm_en;
-               rtsx_pci_write_register(pcr, ASPM_FORCE_CTL,  mask, val);
-       }
+       if (enable)
+               rtsx_pci_enable_aspm(pcr);
+       else
+               rtsx_pci_disable_aspm(pcr);
 
        pcr->aspm_enabled = enable;
 }
 
 #define L1_SNOOZE_TEST_EN              BIT(5)
 #define LTR_L1SS_PWR_GATE_CHECK_CARD_EN        BIT(6)
 
-enum dev_aspm_mode {
-       DEV_ASPM_DYNAMIC,
-       DEV_ASPM_BACKDOOR,
-       DEV_ASPM_STATIC,
-       DEV_ASPM_DISABLE,
-};
-
 /*
  * struct rtsx_cr_option  - card reader option
  * @dev_flags: device flags
  * @ltr_active_latency: ltr mode active latency
  * @ltr_idle_latency: ltr mode idle latency
  * @ltr_l1off_latency: ltr mode l1off latency
- * @dev_aspm_mode: device aspm mode
  * @l1_snooze_delay: l1 snooze delay
  * @ltr_l1off_sspwrgate: ltr l1off sspwrgate
  * @ltr_l1off_snooze_sspwrgate: ltr l1off snooze sspwrgate
        u32 ltr_active_latency;
        u32 ltr_idle_latency;
        u32 ltr_l1off_latency;
-       enum dev_aspm_mode dev_aspm_mode;
        u32 l1_snooze_delay;
        u8 ltr_l1off_sspwrgate;
        u8 ltr_l1off_snooze_sspwrgate;