SET_TX_DESC_TX_BUFFER_SIZE(pdesc, (u16)(skb->len));
                SET_TX_DESC_TX_BUFFER_ADDRESS(pdesc, cpu_to_le32(mapping));
 
+               wmb();
                SET_TX_DESC_OWN(pdesc, 1);
        } else { /* H2C Command Desc format (Host TXCMD) */
                /* 92SE must set as 1 for firmware download HW DMA error */
                SET_TX_DESC_TX_BUFFER_SIZE(pdesc, (u16)(skb->len));
                SET_TX_DESC_TX_BUFFER_ADDRESS(pdesc, cpu_to_le32(mapping));
 
+               wmb();
                SET_TX_DESC_OWN(pdesc, 1);
 
        }
        if (istx == true) {
                switch (desc_name) {
                case HW_DESC_OWN:
+                       wmb();
                        SET_TX_DESC_OWN(pdesc, 1);
                        break;
                case HW_DESC_TX_NEXTDESC_ADDR:
        } else {
                switch (desc_name) {
                case HW_DESC_RXOWN:
+                       wmb();
                        SET_RX_STATUS_DESC_OWN(pdesc, 1);
                        break;
                case HW_DESC_RXBUFF_ADDR: