arm64: Execute DSB during thread switching for TLB/cache maintenance

The DSB following TLB or cache maintenance ops must be run on the same
CPU. With kernel preemption enabled or for user-space cache maintenance
this may not be the case. This patch adds an explicit DSB in the
__switch_to() function.

Signed-off-by: Catalin Marinas <catalin.marinas@arm.com>

diff --git a/arch/arm64/kernel/process.c b/arch/arm64/kernel/process.c
index c2cc2493481bc7b177eea106bdb9d88fc2aa93f1..116a60abe86fd16d897a6f0f5626a843f2a6abb5 100644 (file)
--- a/arch/arm64/kernel/process.c
+++ b/arch/arm64/kernel/process.c
@@ -313,6 +313,12 @@ struct task_struct *__switch_to(struct task_struct *prev,
        hw_breakpoint_thread_switch(next);
        contextidr_thread_switch(next);
 
+       /*
+        * Complete any pending TLB or cache maintenance on this CPU in case
+        * the thread migrates to a different CPU.
+        */
+       dsb();
+
        /* the actual thread switch */
        last = cpu_switch_to(prev, next);