return rc;
 }
 
-void dpu_crtc_commit_kickoff(struct drm_crtc *crtc)
+void dpu_crtc_commit_kickoff(struct drm_crtc *crtc, bool async)
 {
        struct drm_encoder *encoder;
        struct drm_device *dev = crtc->dev;
                 * Encoder will flush/start now, unless it has a tx pending.
                 * If so, it may delay and flush at an irq event (e.g. ppdone)
                 */
-               dpu_encoder_prepare_for_kickoff(encoder, ¶ms);
+               dpu_encoder_prepare_for_kickoff(encoder, ¶ms, async);
        }
 
-       /* wait for frame_event_done completion */
-       DPU_ATRACE_BEGIN("wait_for_frame_done_event");
-       ret = _dpu_crtc_wait_for_frame_done(crtc);
-       DPU_ATRACE_END("wait_for_frame_done_event");
-       if (ret) {
-               DPU_ERROR("crtc%d wait for frame done failed;frame_pending%d\n",
-                               crtc->base.id,
-                               atomic_read(&dpu_crtc->frame_pending));
-               goto end;
-       }
 
-       if (atomic_inc_return(&dpu_crtc->frame_pending) == 1) {
-               /* acquire bandwidth and other resources */
-               DPU_DEBUG("crtc%d first commit\n", crtc->base.id);
-       } else
-               DPU_DEBUG("crtc%d commit\n", crtc->base.id);
+       if (!async) {
+               /* wait for frame_event_done completion */
+               DPU_ATRACE_BEGIN("wait_for_frame_done_event");
+               ret = _dpu_crtc_wait_for_frame_done(crtc);
+               DPU_ATRACE_END("wait_for_frame_done_event");
+               if (ret) {
+                       DPU_ERROR("crtc%d wait for frame done failed;frame_pending%d\n",
+                                       crtc->base.id,
+                                       atomic_read(&dpu_crtc->frame_pending));
+                       goto end;
+               }
+
+               if (atomic_inc_return(&dpu_crtc->frame_pending) == 1) {
+                       /* acquire bandwidth and other resources */
+                       DPU_DEBUG("crtc%d first commit\n", crtc->base.id);
+               } else
+                       DPU_DEBUG("crtc%d commit\n", crtc->base.id);
 
-       dpu_crtc->play_count++;
+               dpu_crtc->play_count++;
+       }
 
        dpu_vbif_clear_errors(dpu_kms);
 
                if (encoder->crtc != crtc)
                        continue;
 
-               dpu_encoder_kickoff(encoder);
+               dpu_encoder_kickoff(encoder, async);
        }
 
 end:
-       reinit_completion(&dpu_crtc->frame_done_comp);
+       if (!async)
+               reinit_completion(&dpu_crtc->frame_done_comp);
        DPU_ATRACE_END("crtc_commit");
 }
 
 
 /**
  * dpu_crtc_commit_kickoff - trigger kickoff of the commit for this crtc
  * @crtc: Pointer to drm crtc object
+ * @async: true if the commit is asynchronous, false otherwise
  */
-void dpu_crtc_commit_kickoff(struct drm_crtc *crtc);
+void dpu_crtc_commit_kickoff(struct drm_crtc *crtc, bool async);
 
 /**
  * dpu_crtc_complete_commit - callback signalling completion of current commit
 
  * extra_flush_bits: Additional bit mask to include in flush trigger
  */
 static void _dpu_encoder_trigger_flush(struct drm_encoder *drm_enc,
-               struct dpu_encoder_phys *phys, uint32_t extra_flush_bits)
+               struct dpu_encoder_phys *phys, uint32_t extra_flush_bits,
+               bool async)
 {
        struct dpu_hw_ctl *ctl;
        int pending_kickoff_cnt;
                return;
        }
 
-       pending_kickoff_cnt = dpu_encoder_phys_inc_pending(phys);
+       if (!async)
+               pending_kickoff_cnt = dpu_encoder_phys_inc_pending(phys);
+       else
+               pending_kickoff_cnt = atomic_read(&phys->pending_kickoff_cnt);
 
        if (extra_flush_bits && ctl->ops.update_pending_flush)
                ctl->ops.update_pending_flush(ctl, extra_flush_bits);
  *     a time.
  * dpu_enc: Pointer to virtual encoder structure
  */
-static void _dpu_encoder_kickoff_phys(struct dpu_encoder_virt *dpu_enc)
+static void _dpu_encoder_kickoff_phys(struct dpu_encoder_virt *dpu_enc,
+                                     bool async)
 {
        struct dpu_hw_ctl *ctl;
        uint32_t i, pending_flush;
                        set_bit(i, dpu_enc->frame_busy_mask);
                if (!phys->ops.needs_single_flush ||
                                !phys->ops.needs_single_flush(phys))
-                       _dpu_encoder_trigger_flush(&dpu_enc->base, phys, 0x0);
+                       _dpu_encoder_trigger_flush(&dpu_enc->base, phys, 0x0,
+                                                  async);
                else if (ctl->ops.get_pending_flush)
                        pending_flush |= ctl->ops.get_pending_flush(ctl);
        }
                _dpu_encoder_trigger_flush(
                                &dpu_enc->base,
                                dpu_enc->cur_master,
-                               pending_flush);
+                               pending_flush, async);
        }
 
        _dpu_encoder_trigger_start(dpu_enc->cur_master);
 }
 
 void dpu_encoder_prepare_for_kickoff(struct drm_encoder *drm_enc,
-               struct dpu_encoder_kickoff_params *params)
+               struct dpu_encoder_kickoff_params *params, bool async)
 {
        struct dpu_encoder_virt *dpu_enc;
        struct dpu_encoder_phys *phys;
        }
 }
 
-void dpu_encoder_kickoff(struct drm_encoder *drm_enc)
+void dpu_encoder_kickoff(struct drm_encoder *drm_enc, bool async)
 {
        struct dpu_encoder_virt *dpu_enc;
        struct dpu_encoder_phys *phys;
                ((atomic_read(&dpu_enc->frame_done_timeout) * HZ) / 1000));
 
        /* All phys encs are ready to go, trigger the kickoff */
-       _dpu_encoder_kickoff_phys(dpu_enc);
+       _dpu_encoder_kickoff_phys(dpu_enc, async);
 
        /* allow phys encs to handle any post-kickoff business */
        for (i = 0; i < dpu_enc->num_phys_encs; i++) {
 
  *     Delayed: Block until next trigger can be issued.
  * @encoder:   encoder pointer
  * @params:    kickoff time parameters
+ * @async:     true if this is an asynchronous commit
  */
 void dpu_encoder_prepare_for_kickoff(struct drm_encoder *encoder,
-               struct dpu_encoder_kickoff_params *params);
+               struct dpu_encoder_kickoff_params *params, bool async);
 
 /**
  * dpu_encoder_trigger_kickoff_pending - Clear the flush bits from previous
  * dpu_encoder_kickoff - trigger a double buffer flip of the ctl path
  *     (i.e. ctl flush and start) immediately.
  * @encoder:   encoder pointer
+ * @async:     true if this is an asynchronous commit
  */
-void dpu_encoder_kickoff(struct drm_encoder *encoder);
+void dpu_encoder_kickoff(struct drm_encoder *encoder, bool async);
 
 /**
  * dpu_encoder_wait_for_event - Waits for encoder events
 
 
        if (crtc && crtc->state->active) {
                trace_dpu_kms_enc_enable(DRMID(crtc));
-               dpu_crtc_commit_kickoff(crtc);
+               dpu_crtc_commit_kickoff(crtc, false);
        }
 }
 
 
                if (crtc->state->active) {
                        trace_dpu_kms_commit(DRMID(crtc));
-                       dpu_crtc_commit_kickoff(crtc);
+                       dpu_crtc_commit_kickoff(crtc,
+                                               state->legacy_cursor_update);
                }
        }
 }
 
                kms->funcs->commit(kms, state);
        }
 
-       msm_atomic_wait_for_commit_done(dev, state);
+       if (!state->legacy_cursor_update)
+               msm_atomic_wait_for_commit_done(dev, state);
 
        kms->funcs->complete_commit(kms, state);