{
        struct amdgpu_device *adev = drm_to_adev(plane->dev);
        const struct drm_format_info *info = drm_format_info(format);
-       int i;
-
+       struct hw_asic_id asic_id = adev->dm.dc->ctx->asic_id;
        enum dm_micro_swizzle microtile = modifier_gfx9_swizzle_mode(modifier) & 3;
 
        if (!info)
                return true;
        }
 
-       /* Check that the modifier is on the list of the plane's supported modifiers. */
-       for (i = 0; i < plane->modifier_count; i++) {
-               if (modifier == plane->modifiers[i])
+       /* check if swizzle mode is supported by this version of DCN */
+       switch (asic_id.chip_family) {
+               case FAMILY_SI:
+               case FAMILY_CI:
+               case FAMILY_KV:
+               case FAMILY_CZ:
+               case FAMILY_VI:
+                       /* asics before AI does not have modifier support */
+                       return false;
+                       break;
+               case FAMILY_AI:
+               case FAMILY_RV:
+               case FAMILY_NV:
+               case FAMILY_VGH:
+               case FAMILY_YELLOW_CARP:
+               case AMDGPU_FAMILY_GC_10_3_6:
+               case AMDGPU_FAMILY_GC_10_3_7:
+                       switch (AMD_FMT_MOD_GET(TILE, modifier)) {
+                               case AMD_FMT_MOD_TILE_GFX9_64K_R_X:
+                               case AMD_FMT_MOD_TILE_GFX9_64K_D_X:
+                               case AMD_FMT_MOD_TILE_GFX9_64K_S_X:
+                               case AMD_FMT_MOD_TILE_GFX9_64K_D:
+                                       return true;
+                                       break;
+                               default:
+                                       return false;
+                                       break;
+                       }
+                       break;
+               case AMDGPU_FAMILY_GC_11_0_0:
+                       switch (AMD_FMT_MOD_GET(TILE, modifier)) {
+                               case AMD_FMT_MOD_TILE_GFX11_256K_R_X:
+                               case AMD_FMT_MOD_TILE_GFX9_64K_R_X:
+                               case AMD_FMT_MOD_TILE_GFX9_64K_D_X:
+                               case AMD_FMT_MOD_TILE_GFX9_64K_S_X:
+                               case AMD_FMT_MOD_TILE_GFX9_64K_D:
+                                       return true;
+                                       break;
+                               default:
+                                       return false;
+                                       break;
+                       }
+                       break;
+               default:
+                       ASSERT(0); /* Unknown asic */
                        break;
        }
-       if (i == plane->modifier_count)
-               return false;
 
        /*
         * For D swizzle the canonical modifier depends on the bpp, so check