drm/nouveau/ce: switch to instanced constructor

Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
Reviewed-by: Lyude Paul <lyude@redhat.com>

diff --git a/drivers/gpu/drm/nouveau/include/nvkm/core/device.h b/drivers/gpu/drm/nouveau/include/nvkm/core/device.h
index 29947b3c2e4fd6e6d55ea5db530498cfdd9046c1..902976fba46fdae258c0d8dd26c483feb6c18e85 100644 (file)
--- a/drivers/gpu/drm/nouveau/include/nvkm/core/device.h
+++ b/drivers/gpu/drm/nouveau/include/nvkm/core/device.h
@@ -60,7 +60,6 @@ struct nvkm_device {
                struct notifier_block nb;
        } acpi;
 
-       struct nvkm_engine *ce[9];
        struct nvkm_engine *cipher;
        struct nvkm_disp *disp;
        struct nvkm_dma *dma;
@@ -121,7 +120,6 @@ struct nvkm_device_chip {
 #undef NVKM_LAYOUT_INST
 #undef NVKM_LAYOUT_ONCE
 
-       int (*ce[9]   )(struct nvkm_device *, int idx, struct nvkm_engine **);
        int (*cipher  )(struct nvkm_device *, int idx, struct nvkm_engine **);
        int (*disp    )(struct nvkm_device *, int idx, struct nvkm_disp **);
        int (*dma     )(struct nvkm_device *, int idx, struct nvkm_dma **);

diff --git a/drivers/gpu/drm/nouveau/include/nvkm/core/engine.h b/drivers/gpu/drm/nouveau/include/nvkm/core/engine.h
index d368956501803804bcb6820a74317bb0219f4125..1a131aaa3a25da5417b355cac36391ad25273520 100644 (file)
--- a/drivers/gpu/drm/nouveau/include/nvkm/core/engine.h
+++ b/drivers/gpu/drm/nouveau/include/nvkm/core/engine.h
@@ -53,8 +53,13 @@ int nvkm_engine_ctor_(const struct nvkm_engine_func *, bool old, struct nvkm_dev
 #define nvkm_engine_ctor_n(f,d,t,i,e,s) nvkm_engine_ctor_((f), false, (d), (t), (i), (e), (s))
 #define nvkm_engine_ctor__(_1,_2,_3,_4,_5,_6,IMPL,...) IMPL
 #define nvkm_engine_ctor(A...) nvkm_engine_ctor__(A, nvkm_engine_ctor_n, nvkm_engine_ctor_o)(A)
-int nvkm_engine_new_(const struct nvkm_engine_func *, struct nvkm_device *,
-                    int index, bool enable, struct nvkm_engine **);
+int nvkm_engine_new__(const struct nvkm_engine_func *, bool old, struct nvkm_device *,
+                    enum nvkm_subdev_type, int, bool enable, struct nvkm_engine **);
+#define nvkm_engine_new__o(f,d,i,  e,s) nvkm_engine_new__((f),  true, (d), (i), -1 , (e), (s))
+#define nvkm_engine_new__n(f,d,t,i,e,s) nvkm_engine_new__((f), false, (d), (t), (i), (e), (s))
+#define nvkm_engine_new___(_1,_2,_3,_4,_5,_6,IMPL,...) IMPL
+#define nvkm_engine_new_(A...) nvkm_engine_new___(A, nvkm_engine_new__n, nvkm_engine_new__o)(A)
+
 struct nvkm_engine *nvkm_engine_ref(struct nvkm_engine *);
 void nvkm_engine_unref(struct nvkm_engine **);
 void nvkm_engine_tile(struct nvkm_engine *, int region);

diff --git a/drivers/gpu/drm/nouveau/include/nvkm/core/layout.h b/drivers/gpu/drm/nouveau/include/nvkm/core/layout.h
index f2a4162da5ef274945873cdb6a23165525285432..72ba4d5feed91afd63a4538ced6c4e498a8c444c 100644 (file)
--- a/drivers/gpu/drm/nouveau/include/nvkm/core/layout.h
+++ b/drivers/gpu/drm/nouveau/include/nvkm/core/layout.h
@@ -26,4 +26,5 @@ NVKM_LAYOUT_ONCE(NVKM_SUBDEV_CLK     , struct nvkm_clk     ,      clk)
 NVKM_LAYOUT_ONCE(NVKM_SUBDEV_GSP     , struct nvkm_gsp     ,      gsp)
 
 NVKM_LAYOUT_ONCE(NVKM_ENGINE_BSP     , struct nvkm_engine  ,      bsp)
+NVKM_LAYOUT_INST(NVKM_ENGINE_CE      , struct nvkm_engine  ,       ce, 9)
 NVKM_LAYOUT_ONCE(NVKM_ENGINE_VP      , struct nvkm_engine  ,       vp)

diff --git a/drivers/gpu/drm/nouveau/include/nvkm/engine/ce.h b/drivers/gpu/drm/nouveau/include/nvkm/engine/ce.h
index 86f420f4630b28320f17960000ff616eab9399fc..cfd2da8e66fed60efd4a136bfedbe54d452aa5b1 100644 (file)
--- a/drivers/gpu/drm/nouveau/include/nvkm/engine/ce.h
+++ b/drivers/gpu/drm/nouveau/include/nvkm/engine/ce.h
@@ -3,13 +3,13 @@
 #define __NVKM_CE_H__
 #include <engine/falcon.h>
 
-int gt215_ce_new(struct nvkm_device *, int, struct nvkm_engine **);
-int gf100_ce_new(struct nvkm_device *, int, struct nvkm_engine **);
-int gk104_ce_new(struct nvkm_device *, int, struct nvkm_engine **);
-int gm107_ce_new(struct nvkm_device *, int, struct nvkm_engine **);
-int gm200_ce_new(struct nvkm_device *, int, struct nvkm_engine **);
-int gp100_ce_new(struct nvkm_device *, int, struct nvkm_engine **);
-int gp102_ce_new(struct nvkm_device *, int, struct nvkm_engine **);
-int gv100_ce_new(struct nvkm_device *, int, struct nvkm_engine **);
-int tu102_ce_new(struct nvkm_device *, int, struct nvkm_engine **);
+int gt215_ce_new(struct nvkm_device *, enum nvkm_subdev_type, int inst, struct nvkm_engine **);
+int gf100_ce_new(struct nvkm_device *, enum nvkm_subdev_type, int inst, struct nvkm_engine **);
+int gk104_ce_new(struct nvkm_device *, enum nvkm_subdev_type, int inst, struct nvkm_engine **);
+int gm107_ce_new(struct nvkm_device *, enum nvkm_subdev_type, int inst, struct nvkm_engine **);
+int gm200_ce_new(struct nvkm_device *, enum nvkm_subdev_type, int inst, struct nvkm_engine **);
+int gp100_ce_new(struct nvkm_device *, enum nvkm_subdev_type, int inst, struct nvkm_engine **);
+int gp102_ce_new(struct nvkm_device *, enum nvkm_subdev_type, int inst, struct nvkm_engine **);
+int gv100_ce_new(struct nvkm_device *, enum nvkm_subdev_type, int inst, struct nvkm_engine **);
+int tu102_ce_new(struct nvkm_device *, enum nvkm_subdev_type, int inst, struct nvkm_engine **);
 #endif

diff --git a/drivers/gpu/drm/nouveau/include/nvkm/engine/falcon.h b/drivers/gpu/drm/nouveau/include/nvkm/engine/falcon.h
index 27c1f868552cdb4380d0904cfda06eab792c725c..8ab27a45b2c23b701f976ccf88a06063eb9d7b1a 100644 (file)
--- a/drivers/gpu/drm/nouveau/include/nvkm/engine/falcon.h
+++ b/drivers/gpu/drm/nouveau/include/nvkm/engine/falcon.h
@@ -63,8 +63,12 @@ void nvkm_falcon_del(struct nvkm_falcon **);
 int nvkm_falcon_get(struct nvkm_falcon *, const struct nvkm_subdev *);
 void nvkm_falcon_put(struct nvkm_falcon *, const struct nvkm_subdev *);
 
-int nvkm_falcon_new_(const struct nvkm_falcon_func *, struct nvkm_device *,
-                    int index, bool enable, u32 addr, struct nvkm_engine **);
+int nvkm_falcon_new__(const struct nvkm_falcon_func *, bool old, struct nvkm_device *,
+                    enum nvkm_subdev_type, int inst, bool enable, u32 addr, struct nvkm_engine **);
+#define nvkm_falcon_new__o(f,d,i,  e,a,s) nvkm_falcon_new__((f),  true, (d), (i), -1 , (e), (a), (s))
+#define nvkm_falcon_new__n(f,d,t,i,e,a,s) nvkm_falcon_new__((f), false, (d), (t), (i), (e), (a), (s))
+#define nvkm_falcon_new___(_1,_2,_3,_4,_5,_6,_7,IMPL,...) IMPL
+#define nvkm_falcon_new_(A...) nvkm_falcon_new___(A, nvkm_falcon_new__n, nvkm_falcon_new__o)(A)
 
 struct nvkm_falcon_func {
        struct {

diff --git a/drivers/gpu/drm/nouveau/nvkm/core/engine.c b/drivers/gpu/drm/nouveau/nvkm/core/engine.c
index ca99cb218516a0fa817a5ebbd663c57785689d00..293b6c3f24d6a2b9afb6d0e490510da2e2267999 100644 (file)
--- a/drivers/gpu/drm/nouveau/nvkm/core/engine.c
+++ b/drivers/gpu/drm/nouveau/nvkm/core/engine.c
@@ -194,11 +194,11 @@ nvkm_engine_ctor_(const struct nvkm_engine_func *func, bool old, struct nvkm_dev
 }
 
 int
-nvkm_engine_new_(const struct nvkm_engine_func *func,
-                struct nvkm_device *device, int index, bool enable,
+nvkm_engine_new__(const struct nvkm_engine_func *func, bool old, struct nvkm_device *device,
+                enum nvkm_subdev_type type, int inst, bool enable,
                 struct nvkm_engine **pengine)
 {
        if (!(*pengine = kzalloc(sizeof(**pengine), GFP_KERNEL)))
                return -ENOMEM;
-       return nvkm_engine_ctor(func, device, index, enable, *pengine);
+       return nvkm_engine_ctor_(func, old, device, type, inst, enable, *pengine);
 }

diff --git a/drivers/gpu/drm/nouveau/nvkm/core/subdev.c b/drivers/gpu/drm/nouveau/nvkm/core/subdev.c
index d81d1f716de32f3c4953ffbe420aeb89c6f1dc44..c0129aca8e729cf8e71c8f555944cf7ec848b767 100644 (file)
--- a/drivers/gpu/drm/nouveau/nvkm/core/subdev.c
+++ b/drivers/gpu/drm/nouveau/nvkm/core/subdev.c
@@ -33,15 +33,6 @@ nvkm_subdev_type[NVKM_SUBDEV_NR] = {
 #include <core/layout.h>
 #undef NVKM_LAYOUT_ONCE
 #undef NVKM_LAYOUT_INST
-       [NVKM_ENGINE_CE0     ] = "ce0",
-       [NVKM_ENGINE_CE1     ] = "ce1",
-       [NVKM_ENGINE_CE2     ] = "ce2",
-       [NVKM_ENGINE_CE3     ] = "ce3",
-       [NVKM_ENGINE_CE4     ] = "ce4",
-       [NVKM_ENGINE_CE5     ] = "ce5",
-       [NVKM_ENGINE_CE6     ] = "ce6",
-       [NVKM_ENGINE_CE7     ] = "ce7",
-       [NVKM_ENGINE_CE8     ] = "ce8",
        [NVKM_ENGINE_CIPHER  ] = "cipher",
        [NVKM_ENGINE_DISP    ] = "disp",
        [NVKM_ENGINE_DMAOBJ  ] = "dma",
@@ -211,10 +202,6 @@ nvkm_subdev_ctor_(const struct nvkm_subdev_func *func, bool old,
 
        if (old) {
                switch (subdev->type) {
-               case NVKM_ENGINE_CE0 ... NVKM_ENGINE_CE_LAST:
-                       subdev->type = NVKM_ENGINE_CE;
-                       subdev->inst = subdev->index - NVKM_ENGINE_CE0;
-                       break;
                case NVKM_ENGINE_NVENC0 ... NVKM_ENGINE_NVENC_LAST:
                        subdev->type = NVKM_ENGINE_NVENC;
                        subdev->inst = subdev->index - NVKM_ENGINE_NVENC0;

diff --git a/drivers/gpu/drm/nouveau/nvkm/engine/ce/gf100.c b/drivers/gpu/drm/nouveau/nvkm/engine/ce/gf100.c
index ad9f855c9a407223c63b505e151e34b6953a1f16..847b787dbc31a09548b36834c4b2c5f18d77c441 100644 (file)
--- a/drivers/gpu/drm/nouveau/nvkm/engine/ce/gf100.c
+++ b/drivers/gpu/drm/nouveau/nvkm/engine/ce/gf100.c
@@ -63,16 +63,9 @@ gf100_ce1 = {
 };
 
 int
-gf100_ce_new(struct nvkm_device *device, int index,
+gf100_ce_new(struct nvkm_device *device, enum nvkm_subdev_type type, int inst,
             struct nvkm_engine **pengine)
 {
-       if (index == NVKM_ENGINE_CE0) {
-               return nvkm_falcon_new_(&gf100_ce0, device, index, true,
-                                       0x104000, pengine);
-       } else
-       if (index == NVKM_ENGINE_CE1) {
-               return nvkm_falcon_new_(&gf100_ce1, device, index, true,
-                                       0x105000, pengine);
-       }
-       return -ENODEV;
+       return nvkm_falcon_new_(inst ? &gf100_ce1 : &gf100_ce0, device, type, inst, true,
+                               0x104000 + (inst * 0x1000), pengine);
 }

diff --git a/drivers/gpu/drm/nouveau/nvkm/engine/ce/gk104.c b/drivers/gpu/drm/nouveau/nvkm/engine/ce/gk104.c
index 9e0b53a10f773bf648f046cc8e151427a88afc94..55075f3d80ccafaaf19a8b036043d4c5a6a2009d 100644 (file)
--- a/drivers/gpu/drm/nouveau/nvkm/engine/ce/gk104.c
+++ b/drivers/gpu/drm/nouveau/nvkm/engine/ce/gk104.c
@@ -94,8 +94,8 @@ gk104_ce = {
 };
 
 int
-gk104_ce_new(struct nvkm_device *device, int index,
+gk104_ce_new(struct nvkm_device *device, enum nvkm_subdev_type type, int inst,
             struct nvkm_engine **pengine)
 {
-       return nvkm_engine_new_(&gk104_ce, device, index, true, pengine);
+       return nvkm_engine_new_(&gk104_ce, device, type, inst, true, pengine);
 }

diff --git a/drivers/gpu/drm/nouveau/nvkm/engine/ce/gm107.c b/drivers/gpu/drm/nouveau/nvkm/engine/ce/gm107.c
index c0df7daa85e274760e13cde68d4530fce514f7cf..c3c476592c4343031970104ad753581cfd78c088 100644 (file)
--- a/drivers/gpu/drm/nouveau/nvkm/engine/ce/gm107.c
+++ b/drivers/gpu/drm/nouveau/nvkm/engine/ce/gm107.c
@@ -36,8 +36,8 @@ gm107_ce = {
 };
 
 int
-gm107_ce_new(struct nvkm_device *device, int index,
+gm107_ce_new(struct nvkm_device *device, enum nvkm_subdev_type type, int inst,
             struct nvkm_engine **pengine)
 {
-       return nvkm_engine_new_(&gm107_ce, device, index, true, pengine);
+       return nvkm_engine_new_(&gm107_ce, device, type, inst, true, pengine);
 }

diff --git a/drivers/gpu/drm/nouveau/nvkm/engine/ce/gm200.c b/drivers/gpu/drm/nouveau/nvkm/engine/ce/gm200.c
index c6fa8b20737e690cdc6d5d9e94bdd23b91b1129e..d2db61865371534b0b70b6781246be58787d20c0 100644 (file)
--- a/drivers/gpu/drm/nouveau/nvkm/engine/ce/gm200.c
+++ b/drivers/gpu/drm/nouveau/nvkm/engine/ce/gm200.c
@@ -35,8 +35,8 @@ gm200_ce = {
 };
 
 int
-gm200_ce_new(struct nvkm_device *device, int index,
+gm200_ce_new(struct nvkm_device *device, enum nvkm_subdev_type type, int inst,
             struct nvkm_engine **pengine)
 {
-       return nvkm_engine_new_(&gm200_ce, device, index, true, pengine);
+       return nvkm_engine_new_(&gm200_ce, device, type, inst, true, pengine);
 }

diff --git a/drivers/gpu/drm/nouveau/nvkm/engine/ce/gp100.c b/drivers/gpu/drm/nouveau/nvkm/engine/ce/gp100.c
index c7710456bc309d2c013a37711a1585b8d6a57784..24130198fa62dfba76d57e37ffaff7c772ee9643 100644 (file)
--- a/drivers/gpu/drm/nouveau/nvkm/engine/ce/gp100.c
+++ b/drivers/gpu/drm/nouveau/nvkm/engine/ce/gp100.c
@@ -95,8 +95,8 @@ gp100_ce = {
 };
 
 int
-gp100_ce_new(struct nvkm_device *device, int index,
+gp100_ce_new(struct nvkm_device *device, enum nvkm_subdev_type type, int inst,
             struct nvkm_engine **pengine)
 {
-       return nvkm_engine_new_(&gp100_ce, device, index, true, pengine);
+       return nvkm_engine_new_(&gp100_ce, device, type, inst, true, pengine);
 }

diff --git a/drivers/gpu/drm/nouveau/nvkm/engine/ce/gp102.c b/drivers/gpu/drm/nouveau/nvkm/engine/ce/gp102.c
index 985c8f653874d2a066ad683634ea776d390ac6ec..180d497a95eb0322dc0f792e0c4b500179ca40de 100644 (file)
--- a/drivers/gpu/drm/nouveau/nvkm/engine/ce/gp102.c
+++ b/drivers/gpu/drm/nouveau/nvkm/engine/ce/gp102.c
@@ -37,8 +37,8 @@ gp102_ce = {
 };
 
 int
-gp102_ce_new(struct nvkm_device *device, int index,
+gp102_ce_new(struct nvkm_device *device, enum nvkm_subdev_type type, int inst,
             struct nvkm_engine **pengine)
 {
-       return nvkm_engine_new_(&gp102_ce, device, index, true, pengine);
+       return nvkm_engine_new_(&gp102_ce, device, type, inst, true, pengine);
 }

diff --git a/drivers/gpu/drm/nouveau/nvkm/engine/ce/gt215.c b/drivers/gpu/drm/nouveau/nvkm/engine/ce/gt215.c
index 63ac51a54fd3c981d105e9b1cdb0525ac7016be9..20df04ba7f09ca36b5f17b7d41461023858fdc21 100644 (file)
--- a/drivers/gpu/drm/nouveau/nvkm/engine/ce/gt215.c
+++ b/drivers/gpu/drm/nouveau/nvkm/engine/ce/gt215.c
@@ -75,9 +75,9 @@ gt215_ce = {
 };
 
 int
-gt215_ce_new(struct nvkm_device *device, int index,
+gt215_ce_new(struct nvkm_device *device, enum nvkm_subdev_type type, int inst,
             struct nvkm_engine **pengine)
 {
-       return nvkm_falcon_new_(&gt215_ce, device, index,
+       return nvkm_falcon_new_(&gt215_ce, device, type, inst,
                                (device->chipset != 0xaf), 0x104000, pengine);
 }

diff --git a/drivers/gpu/drm/nouveau/nvkm/engine/ce/gv100.c b/drivers/gpu/drm/nouveau/nvkm/engine/ce/gv100.c
index fcda3de45857583be80a84bdaa02a0713200b1fb..cd5e9cdca1cf9609f3d88fcfc4d2de06ce93a527 100644 (file)
--- a/drivers/gpu/drm/nouveau/nvkm/engine/ce/gv100.c
+++ b/drivers/gpu/drm/nouveau/nvkm/engine/ce/gv100.c
@@ -33,8 +33,8 @@ gv100_ce = {
 };
 
 int
-gv100_ce_new(struct nvkm_device *device, int index,
+gv100_ce_new(struct nvkm_device *device, enum nvkm_subdev_type type, int inst,
             struct nvkm_engine **pengine)
 {
-       return nvkm_engine_new_(&gv100_ce, device, index, true, pengine);
+       return nvkm_engine_new_(&gv100_ce, device, type, inst, true, pengine);
 }

diff --git a/drivers/gpu/drm/nouveau/nvkm/engine/ce/tu102.c b/drivers/gpu/drm/nouveau/nvkm/engine/ce/tu102.c
index b4308e2d8c759962fbd91e8deecea968a7b6d6e4..e5ff92d9364cb0e8ebabe7b4dead56cfb02b96af 100644 (file)
--- a/drivers/gpu/drm/nouveau/nvkm/engine/ce/tu102.c
+++ b/drivers/gpu/drm/nouveau/nvkm/engine/ce/tu102.c
@@ -33,8 +33,8 @@ tu102_ce = {
 };
 
 int
-tu102_ce_new(struct nvkm_device *device, int index,
+tu102_ce_new(struct nvkm_device *device, enum nvkm_subdev_type type, int inst,
             struct nvkm_engine **pengine)
 {
-       return nvkm_engine_new_(&tu102_ce, device, index, true, pengine);
+       return nvkm_engine_new_(&tu102_ce, device, type, inst, true, pengine);
 }

diff --git a/drivers/gpu/drm/nouveau/nvkm/engine/device/base.c b/drivers/gpu/drm/nouveau/nvkm/engine/device/base.c
index e86bff94a0f4f3027cb86307a4964026660f4d4c..14636df826304d43084a53636682423d619f189f 100644 (file)
--- a/drivers/gpu/drm/nouveau/nvkm/engine/device/base.c
+++ b/drivers/gpu/drm/nouveau/nvkm/engine/device/base.c
@@ -1159,7 +1159,7 @@ nva3_chipset = {
        .therm    = { 0x00000001, gt215_therm_new },
        .timer    = { 0x00000001, nv41_timer_new },
        .volt     = { 0x00000001, nv40_volt_new },
-       .ce[0] = gt215_ce_new,
+       .ce       = { 0x00000001, gt215_ce_new },
        .disp = gt215_disp_new,
        .dma = nv50_dma_new,
        .fifo = g84_fifo_new,
@@ -1193,7 +1193,7 @@ nva5_chipset = {
        .therm    = { 0x00000001, gt215_therm_new },
        .timer    = { 0x00000001, nv41_timer_new },
        .volt     = { 0x00000001, nv40_volt_new },
-       .ce[0] = gt215_ce_new,
+       .ce       = { 0x00000001, gt215_ce_new },
        .disp = gt215_disp_new,
        .dma = nv50_dma_new,
        .fifo = g84_fifo_new,
@@ -1226,7 +1226,7 @@ nva8_chipset = {
        .therm    = { 0x00000001, gt215_therm_new },
        .timer    = { 0x00000001, nv41_timer_new },
        .volt     = { 0x00000001, nv40_volt_new },
-       .ce[0] = gt215_ce_new,
+       .ce       = { 0x00000001, gt215_ce_new },
        .disp = gt215_disp_new,
        .dma = nv50_dma_new,
        .fifo = g84_fifo_new,
@@ -1323,7 +1323,7 @@ nvaf_chipset = {
        .therm    = { 0x00000001, gt215_therm_new },
        .timer    = { 0x00000001, nv41_timer_new },
        .volt     = { 0x00000001, nv40_volt_new },
-       .ce[0] = gt215_ce_new,
+       .ce       = { 0x00000001, gt215_ce_new },
        .disp = mcp89_disp_new,
        .dma = nv50_dma_new,
        .fifo = g84_fifo_new,
@@ -1359,8 +1359,7 @@ nvc0_chipset = {
        .therm    = { 0x00000001, gt215_therm_new },
        .timer    = { 0x00000001, nv41_timer_new },
        .volt     = { 0x00000001, gf100_volt_new },
-       .ce[0] = gf100_ce_new,
-       .ce[1] = gf100_ce_new,
+       .ce       = { 0x00000003, gf100_ce_new },
        .disp = gt215_disp_new,
        .dma = gf100_dma_new,
        .fifo = gf100_fifo_new,
@@ -1396,7 +1395,7 @@ nvc1_chipset = {
        .therm    = { 0x00000001, gt215_therm_new },
        .timer    = { 0x00000001, nv41_timer_new },
        .volt     = { 0x00000001, gf100_volt_new },
-       .ce[0] = gf100_ce_new,
+       .ce       = { 0x00000001, gf100_ce_new },
        .disp = gt215_disp_new,
        .dma = gf100_dma_new,
        .fifo = gf100_fifo_new,
@@ -1432,7 +1431,7 @@ nvc3_chipset = {
        .therm    = { 0x00000001, gt215_therm_new },
        .timer    = { 0x00000001, nv41_timer_new },
        .volt     = { 0x00000001, gf100_volt_new },
-       .ce[0] = gf100_ce_new,
+       .ce       = { 0x00000001, gf100_ce_new },
        .disp = gt215_disp_new,
        .dma = gf100_dma_new,
        .fifo = gf100_fifo_new,
@@ -1468,8 +1467,7 @@ nvc4_chipset = {
        .therm    = { 0x00000001, gt215_therm_new },
        .timer    = { 0x00000001, nv41_timer_new },
        .volt     = { 0x00000001, gf100_volt_new },
-       .ce[0] = gf100_ce_new,
-       .ce[1] = gf100_ce_new,
+       .ce       = { 0x00000003, gf100_ce_new },
        .disp = gt215_disp_new,
        .dma = gf100_dma_new,
        .fifo = gf100_fifo_new,
@@ -1505,8 +1503,7 @@ nvc8_chipset = {
        .therm    = { 0x00000001, gt215_therm_new },
        .timer    = { 0x00000001, nv41_timer_new },
        .volt     = { 0x00000001, gf100_volt_new },
-       .ce[0] = gf100_ce_new,
-       .ce[1] = gf100_ce_new,
+       .ce       = { 0x00000003, gf100_ce_new },
        .disp = gt215_disp_new,
        .dma = gf100_dma_new,
        .fifo = gf100_fifo_new,
@@ -1542,8 +1539,7 @@ nvce_chipset = {
        .therm    = { 0x00000001, gt215_therm_new },
        .timer    = { 0x00000001, nv41_timer_new },
        .volt     = { 0x00000001, gf100_volt_new },
-       .ce[0] = gf100_ce_new,
-       .ce[1] = gf100_ce_new,
+       .ce       = { 0x00000003, gf100_ce_new },
        .disp = gt215_disp_new,
        .dma = gf100_dma_new,
        .fifo = gf100_fifo_new,
@@ -1579,7 +1575,7 @@ nvcf_chipset = {
        .therm    = { 0x00000001, gt215_therm_new },
        .timer    = { 0x00000001, nv41_timer_new },
        .volt     = { 0x00000001, gf100_volt_new },
-       .ce[0] = gf100_ce_new,
+       .ce       = { 0x00000001, gf100_ce_new },
        .disp = gt215_disp_new,
        .dma = gf100_dma_new,
        .fifo = gf100_fifo_new,
@@ -1614,7 +1610,7 @@ nvd7_chipset = {
        .therm    = { 0x00000001, gf119_therm_new },
        .timer    = { 0x00000001, nv41_timer_new },
        .volt     = { 0x00000001, gf117_volt_new },
-       .ce[0] = gf100_ce_new,
+       .ce       = { 0x00000001, gf100_ce_new },
        .disp = gf119_disp_new,
        .dma = gf119_dma_new,
        .fifo = gf100_fifo_new,
@@ -1650,7 +1646,7 @@ nvd9_chipset = {
        .therm    = { 0x00000001, gf119_therm_new },
        .timer    = { 0x00000001, nv41_timer_new },
        .volt     = { 0x00000001, gf100_volt_new },
-       .ce[0] = gf100_ce_new,
+       .ce       = { 0x00000001, gf100_ce_new },
        .disp = gf119_disp_new,
        .dma = gf119_dma_new,
        .fifo = gf100_fifo_new,
@@ -1687,9 +1683,7 @@ nve4_chipset = {
        .timer    = { 0x00000001, nv41_timer_new },
        .top      = { 0x00000001, gk104_top_new },
        .volt     = { 0x00000001, gk104_volt_new },
-       .ce[0] = gk104_ce_new,
-       .ce[1] = gk104_ce_new,
-       .ce[2] = gk104_ce_new,
+       .ce       = { 0x00000007, gk104_ce_new },
        .disp = gk104_disp_new,
        .dma = gf119_dma_new,
        .fifo = gk104_fifo_new,
@@ -1726,9 +1720,7 @@ nve6_chipset = {
        .timer    = { 0x00000001, nv41_timer_new },
        .top      = { 0x00000001, gk104_top_new },
        .volt     = { 0x00000001, gk104_volt_new },
-       .ce[0] = gk104_ce_new,
-       .ce[1] = gk104_ce_new,
-       .ce[2] = gk104_ce_new,
+       .ce       = { 0x00000007, gk104_ce_new },
        .disp = gk104_disp_new,
        .dma = gf119_dma_new,
        .fifo = gk104_fifo_new,
@@ -1765,9 +1757,7 @@ nve7_chipset = {
        .timer    = { 0x00000001, nv41_timer_new },
        .top      = { 0x00000001, gk104_top_new },
        .volt     = { 0x00000001, gk104_volt_new },
-       .ce[0] = gk104_ce_new,
-       .ce[1] = gk104_ce_new,
-       .ce[2] = gk104_ce_new,
+       .ce       = { 0x00000007, gk104_ce_new },
        .disp = gk104_disp_new,
        .dma = gf119_dma_new,
        .fifo = gk104_fifo_new,
@@ -1796,7 +1786,7 @@ nvea_chipset = {
        .timer    = { 0x00000001, gk20a_timer_new },
        .top      = { 0x00000001, gk104_top_new },
        .volt     = { 0x00000001, gk20a_volt_new },
-       .ce[2] = gk104_ce_new,
+       .ce       = { 0x00000004, gk104_ce_new },
        .dma = gf119_dma_new,
        .fifo = gk20a_fifo_new,
        .gr = gk20a_gr_new,
@@ -1829,9 +1819,7 @@ nvf0_chipset = {
        .timer    = { 0x00000001, nv41_timer_new },
        .top      = { 0x00000001, gk104_top_new },
        .volt     = { 0x00000001, gk104_volt_new },
-       .ce[0] = gk104_ce_new,
-       .ce[1] = gk104_ce_new,
-       .ce[2] = gk104_ce_new,
+       .ce       = { 0x00000007, gk104_ce_new },
        .disp = gk110_disp_new,
        .dma = gf119_dma_new,
        .fifo = gk110_fifo_new,
@@ -1867,9 +1855,7 @@ nvf1_chipset = {
        .timer    = { 0x00000001, nv41_timer_new },
        .top      = { 0x00000001, gk104_top_new },
        .volt     = { 0x00000001, gk104_volt_new },
-       .ce[0] = gk104_ce_new,
-       .ce[1] = gk104_ce_new,
-       .ce[2] = gk104_ce_new,
+       .ce       = { 0x00000007, gk104_ce_new },
        .disp = gk110_disp_new,
        .dma = gf119_dma_new,
        .fifo = gk110_fifo_new,
@@ -1905,9 +1891,7 @@ nv106_chipset = {
        .timer    = { 0x00000001, nv41_timer_new },
        .top      = { 0x00000001, gk104_top_new },
        .volt     = { 0x00000001, gk104_volt_new },
-       .ce[0] = gk104_ce_new,
-       .ce[1] = gk104_ce_new,
-       .ce[2] = gk104_ce_new,
+       .ce       = { 0x00000007, gk104_ce_new },
        .disp = gk110_disp_new,
        .dma = gf119_dma_new,
        .fifo = gk208_fifo_new,
@@ -1943,9 +1927,7 @@ nv108_chipset = {
        .timer    = { 0x00000001, nv41_timer_new },
        .top      = { 0x00000001, gk104_top_new },
        .volt     = { 0x00000001, gk104_volt_new },
-       .ce[0] = gk104_ce_new,
-       .ce[1] = gk104_ce_new,
-       .ce[2] = gk104_ce_new,
+       .ce       = { 0x00000007, gk104_ce_new },
        .disp = gk110_disp_new,
        .dma = gf119_dma_new,
        .fifo = gk208_fifo_new,
@@ -1981,8 +1963,7 @@ nv117_chipset = {
        .timer    = { 0x00000001, gk20a_timer_new },
        .top      = { 0x00000001, gk104_top_new },
        .volt     = { 0x00000001, gk104_volt_new },
-       .ce[0] = gm107_ce_new,
-       .ce[2] = gm107_ce_new,
+       .ce       = { 0x00000005, gm107_ce_new },
        .disp = gm107_disp_new,
        .dma = gf119_dma_new,
        .fifo = gm107_fifo_new,
@@ -2017,8 +1998,7 @@ nv118_chipset = {
        .timer    = { 0x00000001, gk20a_timer_new },
        .top      = { 0x00000001, gk104_top_new },
        .volt     = { 0x00000001, gk104_volt_new },
-       .ce[0] = gm107_ce_new,
-       .ce[2] = gm107_ce_new,
+       .ce       = { 0x00000005, gm107_ce_new },
        .disp = gm107_disp_new,
        .dma = gf119_dma_new,
        .fifo = gm107_fifo_new,
@@ -2051,9 +2031,7 @@ nv120_chipset = {
        .timer    = { 0x00000001, gk20a_timer_new },
        .top      = { 0x00000001, gk104_top_new },
        .volt     = { 0x00000001, gk104_volt_new },
-       .ce[0] = gm200_ce_new,
-       .ce[1] = gm200_ce_new,
-       .ce[2] = gm200_ce_new,
+       .ce       = { 0x00000007, gm200_ce_new },
        .disp = gm200_disp_new,
        .dma = gf119_dma_new,
        .fifo = gm200_fifo_new,
@@ -2089,9 +2067,7 @@ nv124_chipset = {
        .timer    = { 0x00000001, gk20a_timer_new },
        .top      = { 0x00000001, gk104_top_new },
        .volt     = { 0x00000001, gk104_volt_new },
-       .ce[0] = gm200_ce_new,
-       .ce[1] = gm200_ce_new,
-       .ce[2] = gm200_ce_new,
+       .ce       = { 0x00000007, gm200_ce_new },
        .disp = gm200_disp_new,
        .dma = gf119_dma_new,
        .fifo = gm200_fifo_new,
@@ -2127,9 +2103,7 @@ nv126_chipset = {
        .timer    = { 0x00000001, gk20a_timer_new },
        .top      = { 0x00000001, gk104_top_new },
        .volt     = { 0x00000001, gk104_volt_new },
-       .ce[0] = gm200_ce_new,
-       .ce[1] = gm200_ce_new,
-       .ce[2] = gm200_ce_new,
+       .ce       = { 0x00000007, gm200_ce_new },
        .disp = gm200_disp_new,
        .dma = gf119_dma_new,
        .fifo = gm200_fifo_new,
@@ -2157,7 +2131,7 @@ nv12b_chipset = {
        .timer    = { 0x00000001, gk20a_timer_new },
        .top      = { 0x00000001, gk104_top_new },
        .volt     = { 0x00000001, gm20b_volt_new },
-       .ce[2] = gm200_ce_new,
+       .ce       = { 0x00000004, gm200_ce_new },
        .dma = gf119_dma_new,
        .fifo = gm20b_fifo_new,
        .gr = gm20b_gr_new,
@@ -2187,12 +2161,7 @@ nv130_chipset = {
        .pmu      = { 0x00000001, gm200_pmu_new },
        .timer    = { 0x00000001, gk20a_timer_new },
        .top      = { 0x00000001, gk104_top_new },
-       .ce[0] = gp100_ce_new,
-       .ce[1] = gp100_ce_new,
-       .ce[2] = gp100_ce_new,
-       .ce[3] = gp100_ce_new,
-       .ce[4] = gp100_ce_new,
-       .ce[5] = gp100_ce_new,
+       .ce       = { 0x0000003f, gp100_ce_new },
        .dma = gf119_dma_new,
        .disp = gp100_disp_new,
        .fifo = gp100_fifo_new,
@@ -2227,10 +2196,7 @@ nv132_chipset = {
        .pmu      = { 0x00000001, gp102_pmu_new },
        .timer    = { 0x00000001, gk20a_timer_new },
        .top      = { 0x00000001, gk104_top_new },
-       .ce[0] = gp102_ce_new,
-       .ce[1] = gp102_ce_new,
-       .ce[2] = gp102_ce_new,
-       .ce[3] = gp102_ce_new,
+       .ce       = { 0x0000000f, gp102_ce_new },
        .disp = gp102_disp_new,
        .dma = gf119_dma_new,
        .fifo = gp100_fifo_new,
@@ -2265,10 +2231,7 @@ nv134_chipset = {
        .pmu      = { 0x00000001, gp102_pmu_new },
        .timer    = { 0x00000001, gk20a_timer_new },
        .top      = { 0x00000001, gk104_top_new },
-       .ce[0] = gp102_ce_new,
-       .ce[1] = gp102_ce_new,
-       .ce[2] = gp102_ce_new,
-       .ce[3] = gp102_ce_new,
+       .ce       = { 0x0000000f, gp102_ce_new },
        .disp = gp102_disp_new,
        .dma = gf119_dma_new,
        .fifo = gp100_fifo_new,
@@ -2303,10 +2266,7 @@ nv136_chipset = {
        .pmu      = { 0x00000001, gp102_pmu_new },
        .timer    = { 0x00000001, gk20a_timer_new },
        .top      = { 0x00000001, gk104_top_new },
-       .ce[0] = gp102_ce_new,
-       .ce[1] = gp102_ce_new,
-       .ce[2] = gp102_ce_new,
-       .ce[3] = gp102_ce_new,
+       .ce       = { 0x0000000f, gp102_ce_new },
        .disp = gp102_disp_new,
        .dma = gf119_dma_new,
        .fifo = gp100_fifo_new,
@@ -2340,10 +2300,7 @@ nv137_chipset = {
        .pmu      = { 0x00000001, gp102_pmu_new },
        .timer    = { 0x00000001, gk20a_timer_new },
        .top      = { 0x00000001, gk104_top_new },
-       .ce[0] = gp102_ce_new,
-       .ce[1] = gp102_ce_new,
-       .ce[2] = gp102_ce_new,
-       .ce[3] = gp102_ce_new,
+       .ce       = { 0x0000000f, gp102_ce_new },
        .disp = gp102_disp_new,
        .dma = gf119_dma_new,
        .fifo = gp100_fifo_new,
@@ -2378,10 +2335,7 @@ nv138_chipset = {
        .pmu      = { 0x00000001, gp102_pmu_new },
        .timer    = { 0x00000001, gk20a_timer_new },
        .top      = { 0x00000001, gk104_top_new },
-       .ce[0] = gp102_ce_new,
-       .ce[1] = gp102_ce_new,
-       .ce[2] = gp102_ce_new,
-       .ce[3] = gp102_ce_new,
+       .ce       = { 0x0000000f, gp102_ce_new },
        .disp = gp102_disp_new,
        .dma = gf119_dma_new,
        .fifo = gp100_fifo_new,
@@ -2408,7 +2362,7 @@ nv13b_chipset = {
        .pmu      = { 0x00000001, gp10b_pmu_new },
        .timer    = { 0x00000001, gk20a_timer_new },
        .top      = { 0x00000001, gk104_top_new },
-       .ce[0] = gp100_ce_new,
+       .ce       = { 0x00000001, gp100_ce_new },
        .dma = gf119_dma_new,
        .fifo = gp10b_fifo_new,
        .gr = gp10b_gr_new,
@@ -2439,16 +2393,8 @@ nv140_chipset = {
        .therm    = { 0x00000001, gp100_therm_new },
        .timer    = { 0x00000001, gk20a_timer_new },
        .top      = { 0x00000001, gk104_top_new },
+       .ce       = { 0x000001ff, gv100_ce_new },
        .disp = gv100_disp_new,
-       .ce[0] = gv100_ce_new,
-       .ce[1] = gv100_ce_new,
-       .ce[2] = gv100_ce_new,
-       .ce[3] = gv100_ce_new,
-       .ce[4] = gv100_ce_new,
-       .ce[5] = gv100_ce_new,
-       .ce[6] = gv100_ce_new,
-       .ce[7] = gv100_ce_new,
-       .ce[8] = gv100_ce_new,
        .dma = gv100_dma_new,
        .fifo = gv100_fifo_new,
        .gr = gv100_gr_new,
@@ -2483,11 +2429,7 @@ nv162_chipset = {
        .therm    = { 0x00000001, gp100_therm_new },
        .timer    = { 0x00000001, gk20a_timer_new },
        .top      = { 0x00000001, gk104_top_new },
-       .ce[0] = tu102_ce_new,
-       .ce[1] = tu102_ce_new,
-       .ce[2] = tu102_ce_new,
-       .ce[3] = tu102_ce_new,
-       .ce[4] = tu102_ce_new,
+       .ce       = { 0x0000001f, tu102_ce_new },
        .disp = tu102_disp_new,
        .dma = gv100_dma_new,
        .fifo = tu102_fifo_new,
@@ -2521,11 +2463,7 @@ nv164_chipset = {
        .therm    = { 0x00000001, gp100_therm_new },
        .timer    = { 0x00000001, gk20a_timer_new },
        .top      = { 0x00000001, gk104_top_new },
-       .ce[0] = tu102_ce_new,
-       .ce[1] = tu102_ce_new,
-       .ce[2] = tu102_ce_new,
-       .ce[3] = tu102_ce_new,
-       .ce[4] = tu102_ce_new,
+       .ce       = { 0x0000001f, tu102_ce_new },
        .disp = tu102_disp_new,
        .dma = gv100_dma_new,
        .fifo = tu102_fifo_new,
@@ -2560,11 +2498,7 @@ nv166_chipset = {
        .therm    = { 0x00000001, gp100_therm_new },
        .timer    = { 0x00000001, gk20a_timer_new },
        .top      = { 0x00000001, gk104_top_new },
-       .ce[0] = tu102_ce_new,
-       .ce[1] = tu102_ce_new,
-       .ce[2] = tu102_ce_new,
-       .ce[3] = tu102_ce_new,
-       .ce[4] = tu102_ce_new,
+       .ce       = { 0x0000001f, tu102_ce_new },
        .disp = tu102_disp_new,
        .dma = gv100_dma_new,
        .fifo = tu102_fifo_new,
@@ -2600,11 +2534,7 @@ nv167_chipset = {
        .therm    = { 0x00000001, gp100_therm_new },
        .timer    = { 0x00000001, gk20a_timer_new },
        .top      = { 0x00000001, gk104_top_new },
-       .ce[0] = tu102_ce_new,
-       .ce[1] = tu102_ce_new,
-       .ce[2] = tu102_ce_new,
-       .ce[3] = tu102_ce_new,
-       .ce[4] = tu102_ce_new,
+       .ce       = { 0x0000001f, tu102_ce_new },
        .disp = tu102_disp_new,
        .dma = gv100_dma_new,
        .fifo = tu102_fifo_new,
@@ -2638,11 +2568,7 @@ nv168_chipset = {
        .therm    = { 0x00000001, gp100_therm_new },
        .timer    = { 0x00000001, gk20a_timer_new },
        .top      = { 0x00000001, gk104_top_new },
-       .ce[0] = tu102_ce_new,
-       .ce[1] = tu102_ce_new,
-       .ce[2] = tu102_ce_new,
-       .ce[3] = tu102_ce_new,
-       .ce[4] = tu102_ce_new,
+       .ce       = { 0x0000001f, tu102_ce_new },
        .disp = tu102_disp_new,
        .dma = gv100_dma_new,
        .fifo = tu102_fifo_new,
@@ -2938,7 +2864,7 @@ nvkm_device_ctor(const struct nvkm_device_func *func,
        struct nvkm_subdev *subdev;
        u64 mmio_base, mmio_size;
        u32 boot0, boot1, strap;
-       int ret = -EEXIST, i;
+       int ret = -EEXIST, i, j;
        unsigned chipset;
 
        mutex_lock(&nv_devices_mutex);
@@ -3248,15 +3174,6 @@ nvkm_device_ctor(const struct nvkm_device_func *func,
 #include <core/layout.h>
 #undef NVKM_LAYOUT_INST
 #undef NVKM_LAYOUT_ONCE
-               _(NVKM_ENGINE_CE0     ,    ce[0]);
-               _(NVKM_ENGINE_CE1     ,    ce[1]);
-               _(NVKM_ENGINE_CE2     ,    ce[2]);
-               _(NVKM_ENGINE_CE3     ,    ce[3]);
-               _(NVKM_ENGINE_CE4     ,    ce[4]);
-               _(NVKM_ENGINE_CE5     ,    ce[5]);
-               _(NVKM_ENGINE_CE6     ,    ce[6]);
-               _(NVKM_ENGINE_CE7     ,    ce[7]);
-               _(NVKM_ENGINE_CE8     ,    ce[8]);
                _(NVKM_ENGINE_CIPHER  ,   cipher);
                _(NVKM_ENGINE_DISP    ,     disp);
                _(NVKM_ENGINE_DMAOBJ  ,      dma);
@@ -3280,6 +3197,15 @@ nvkm_device_ctor(const struct nvkm_device_func *func,
                _(NVKM_ENGINE_SEC2    ,     sec2);
                _(NVKM_ENGINE_SW      ,       sw);
                _(NVKM_ENGINE_VIC     ,      vic);
+               case NVKM_ENGINE_CE1:
+               case NVKM_ENGINE_CE2:
+               case NVKM_ENGINE_CE3:
+               case NVKM_ENGINE_CE4:
+               case NVKM_ENGINE_CE5:
+               case NVKM_ENGINE_CE6:
+               case NVKM_ENGINE_CE7:
+               case NVKM_ENGINE_CE8:
+                       break;
                default:
                        WARN_ON(1);
                        continue;

diff --git a/drivers/gpu/drm/nouveau/nvkm/engine/falcon.c b/drivers/gpu/drm/nouveau/nvkm/engine/falcon.c
index 11937eb78fc9cea09b213e3691490fcdf429a993..e5a585ce0b87526e2b8734ab4b681dec7866c9a1 100644 (file)
--- a/drivers/gpu/drm/nouveau/nvkm/engine/falcon.c
+++ b/drivers/gpu/drm/nouveau/nvkm/engine/falcon.c
@@ -335,9 +335,9 @@ nvkm_falcon = {
 };
 
 int
-nvkm_falcon_new_(const struct nvkm_falcon_func *func,
-                struct nvkm_device *device, int index, bool enable,
-                u32 addr, struct nvkm_engine **pengine)
+nvkm_falcon_new__(const struct nvkm_falcon_func *func, bool old, struct nvkm_device *device,
+                enum nvkm_subdev_type type, int inst, bool enable, u32 addr,
+                struct nvkm_engine **pengine)
 {
        struct nvkm_falcon *falcon;
 
@@ -351,6 +351,5 @@ nvkm_falcon_new_(const struct nvkm_falcon_func *func,
        falcon->data.size = func->data.size;
        *pengine = &falcon->engine;
 
-       return nvkm_engine_ctor(&nvkm_falcon, device, index,
-                               enable, &falcon->engine);
+       return nvkm_engine_ctor_(&nvkm_falcon, old, device, type, inst, enable, &falcon->engine);
 }

diff --git a/drivers/gpu/drm/nouveau/nvkm/subdev/devinit/gf100.c b/drivers/gpu/drm/nouveau/nvkm/subdev/devinit/gf100.c
index 54735a6a01cb7abb102498c5f4773b51c3e8043c..c60af0060ec663a3965d12806d1d8eaed2274e2c 100644 (file)
--- a/drivers/gpu/drm/nouveau/nvkm/subdev/devinit/gf100.c
+++ b/drivers/gpu/drm/nouveau/nvkm/subdev/devinit/gf100.c
@@ -83,9 +83,9 @@ gf100_devinit_disable(struct nvkm_devinit *init)
        if (r022500 & 0x00000008)
                disable |= (1ULL << NVKM_ENGINE_MSENC);
        if (r022500 & 0x00000100)
-               disable |= (1ULL << NVKM_ENGINE_CE0);
+               nvkm_subdev_disable(device, NVKM_ENGINE_CE, 0);
        if (r022500 & 0x00000200)
-               disable |= (1ULL << NVKM_ENGINE_CE1);
+               nvkm_subdev_disable(device, NVKM_ENGINE_CE, 1);
 
        return disable;
 }

diff --git a/drivers/gpu/drm/nouveau/nvkm/subdev/devinit/gm107.c b/drivers/gpu/drm/nouveau/nvkm/subdev/devinit/gm107.c
index f5eb88bffe3bc9ea9b6c38d5f852695a039a3ca5..0b567431d08796b8823a90905fca488fe7357d39 100644 (file)
--- a/drivers/gpu/drm/nouveau/nvkm/subdev/devinit/gm107.c
+++ b/drivers/gpu/drm/nouveau/nvkm/subdev/devinit/gm107.c
@@ -35,9 +35,9 @@ gm107_devinit_disable(struct nvkm_devinit *init)
        u64 disable = 0ULL;
 
        if (r021c00 & 0x00000001)
-               disable |= (1ULL << NVKM_ENGINE_CE0);
+               nvkm_subdev_disable(device, NVKM_ENGINE_CE, 0);
        if (r021c00 & 0x00000004)
-               disable |= (1ULL << NVKM_ENGINE_CE2);
+               nvkm_subdev_disable(device, NVKM_ENGINE_CE, 2);
        if (r021c04 & 0x00000001)
                disable |= (1ULL << NVKM_ENGINE_DISP);
 

diff --git a/drivers/gpu/drm/nouveau/nvkm/subdev/devinit/gt215.c b/drivers/gpu/drm/nouveau/nvkm/subdev/devinit/gt215.c
index f93ab872395f566963d52cd3b36ad2115ff45143..d9189cfaa7d2b012f42c57585cd1502b4b89706a 100644 (file)
--- a/drivers/gpu/drm/nouveau/nvkm/subdev/devinit/gt215.c
+++ b/drivers/gpu/drm/nouveau/nvkm/subdev/devinit/gt215.c
@@ -80,7 +80,7 @@ gt215_devinit_disable(struct nvkm_devinit *init)
        if (!(r00154c & 0x00000020))
                disable |= (1ULL << NVKM_ENGINE_MSVLD);
        if (!(r00154c & 0x00000200))
-               disable |= (1ULL << NVKM_ENGINE_CE0);
+               nvkm_subdev_disable(device, NVKM_ENGINE_CE, 0);
 
        return disable;
 }

diff --git a/drivers/gpu/drm/nouveau/nvkm/subdev/devinit/mcp89.c b/drivers/gpu/drm/nouveau/nvkm/subdev/devinit/mcp89.c
index cb74d433ade2c43041bff6144bb1dfbc95eb0e64..e7829eeaecc13f61369ca2cf0ea22cdb1f8a726f 100644 (file)
--- a/drivers/gpu/drm/nouveau/nvkm/subdev/devinit/mcp89.c
+++ b/drivers/gpu/drm/nouveau/nvkm/subdev/devinit/mcp89.c
@@ -46,7 +46,7 @@ mcp89_devinit_disable(struct nvkm_devinit *init)
        if (!(r00154c & 0x00000040))
                disable |= (1ULL << NVKM_ENGINE_VIC);
        if (!(r00154c & 0x00000200))
-               disable |= (1ULL << NVKM_ENGINE_CE0);
+               nvkm_subdev_disable(device, NVKM_ENGINE_CE, 0);
 
        return disable;
 }