drm/i915/display/adl_p: Updates to HDMI combo PHY voltage swing table

New updates to HDMI combo PHY voltage swing tables. Actually with this
update (bspec updated on 08/17/2021), the values are reverted back to be
same as icelake for HDMI combo PHY.

Bspec: 49291
Signed-off-by: Balasubramani Vivekanandan <balasubramani.vivekanandan@intel.com>
Reviewed-by: Matt Atwood <matthew.s.atwood@intel.com>
Signed-off-by: Matt Roper <matthew.d.roper@intel.com>
Link: https://patchwork.freedesktop.org/patch/msgid/20220526064935.969225-1-balasubramani.vivekanandan@intel.com

diff --git a/drivers/gpu/drm/i915/display/intel_ddi_buf_trans.c b/drivers/gpu/drm/i915/display/intel_ddi_buf_trans.c
index 85f58dd3df722c74cd3eb876a030a721daf9c34e..5cae1d19bcbb62076527452c0e2b944bb61fae01 100644 (file)
--- a/drivers/gpu/drm/i915/display/intel_ddi_buf_trans.c
+++ b/drivers/gpu/drm/i915/display/intel_ddi_buf_trans.c
@@ -878,26 +878,6 @@ static const struct intel_ddi_buf_trans adls_combo_phy_trans_edp_hbr3 = {
        .num_entries = ARRAY_SIZE(_adls_combo_phy_trans_edp_hbr3),
 };
 
-static const union intel_ddi_buf_trans_entry _adlp_combo_phy_trans_hdmi[] = {
-                                                       /* NT mV Trans mV    db   */
-       { .icl = { 0x6, 0x60, 0x3F, 0x00, 0x00 } },     /*  400    400      0.0 */
-       { .icl = { 0x6, 0x68, 0x3F, 0x00, 0x00 } },     /*  500    500      0.0 */
-       { .icl = { 0xA, 0x73, 0x3F, 0x00, 0x00 } },     /*  650    650      0.0 ALS */
-       { .icl = { 0xA, 0x78, 0x3F, 0x00, 0x00 } },     /*  800    800      0.0 */
-       { .icl = { 0xB, 0x7F, 0x3F, 0x00, 0x00 } },     /* 1000   1000      0.0 Re-timer */
-       { .icl = { 0xB, 0x7F, 0x3B, 0x00, 0x04 } },     /* Full    Red     -1.5 */
-       { .icl = { 0xB, 0x7F, 0x39, 0x00, 0x06 } },     /* Full    Red     -1.8 */
-       { .icl = { 0xB, 0x7F, 0x37, 0x00, 0x08 } },     /* Full    Red     -2.0 CRLS */
-       { .icl = { 0xB, 0x7F, 0x35, 0x00, 0x0A } },     /* Full    Red     -2.5 */
-       { .icl = { 0xB, 0x7F, 0x33, 0x00, 0x0C } },     /* Full    Red     -3.0 */
-};
-
-static const struct intel_ddi_buf_trans adlp_combo_phy_trans_hdmi = {
-       .entries = _adlp_combo_phy_trans_hdmi,
-       .num_entries = ARRAY_SIZE(_adlp_combo_phy_trans_hdmi),
-       .hdmi_default_entry = ARRAY_SIZE(_adlp_combo_phy_trans_hdmi) - 1,
-};
-
 static const union intel_ddi_buf_trans_entry _adlp_combo_phy_trans_dp_hbr[] = {
                                                        /* NT mV Trans mV db    */
        { .icl = { 0xA, 0x35, 0x3F, 0x00, 0x00 } },     /* 350   350      0.0   */
@@ -1556,7 +1536,7 @@ adlp_get_combo_buf_trans(struct intel_encoder *encoder,
                         int *n_entries)
 {
        if (intel_crtc_has_type(crtc_state, INTEL_OUTPUT_HDMI))
-               return intel_get_buf_trans(&adlp_combo_phy_trans_hdmi, n_entries);
+               return intel_get_buf_trans(&icl_combo_phy_trans_hdmi, n_entries);
        else if (intel_crtc_has_type(crtc_state, INTEL_OUTPUT_EDP))
                return adlp_get_combo_buf_trans_edp(encoder, crtc_state, n_entries);
        else