drm/amd/display: Remove redundant var from display_rq_dig_calc in dml

[WHY]
Coverity analysis flagged these files as containing DEADCODE, i. e.
redundant or unreachabale. In these files, variable 'mode_422' is
always the same file (0 or false), so any code logic with it is
redundant.

[HOW]
Removed 'mode_422' variable and all code with it from
'display_rq_dlg_calc_' functions in dml.

Reviewed-by: Alex Hung <alex.hung@amd.com>
Signed-off-by: Alex Hung <alex.hung@amd.com>
Signed-off-by: Ivan Lipski <ivlipski@amd.com>
Tested-by: Daniel Wheeler <daniel.wheeler@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>

diff --git a/drivers/gpu/drm/amd/display/dc/dml/dcn20/display_rq_dlg_calc_20.c b/drivers/gpu/drm/amd/display/dc/dml/dcn20/display_rq_dlg_calc_20.c
index 07146569e3351ec061a27e5b4b63e07bcb4c8454..7c56ad0f881224333f60d265313bcde6f896cfa8 100644 (file)
--- a/drivers/gpu/drm/amd/display/dc/dml/dcn20/display_rq_dlg_calc_20.c
+++ b/drivers/gpu/drm/amd/display/dc/dml/dcn20/display_rq_dlg_calc_20.c
@@ -688,12 +688,11 @@ static void get_surf_rq_param(struct display_mode_lib *mode_lib,
                const display_pipe_source_params_st *pipe_src_param,
                bool is_chroma)
 {
-       bool mode_422 = false;
        unsigned int vp_width = 0;
        unsigned int vp_height = 0;
        unsigned int data_pitch = 0;
        unsigned int meta_pitch = 0;
-       unsigned int ppe = mode_422 ? 2 : 1;
+       unsigned int ppe = 1;
 
        // TODO check if ppe apply for both luma and chroma in 422 case
        if (is_chroma) {
@@ -825,7 +824,6 @@ static void dml20_rq_dlg_get_dlg_params(struct display_mode_lib *mode_lib,
        double min_dst_y_ttu_vblank;
        unsigned int dlg_vblank_start;
        bool dual_plane;
-       bool mode_422;
        unsigned int access_dir;
        unsigned int vp_height_l;
        unsigned int vp_width_l;
@@ -971,7 +969,6 @@ static void dml20_rq_dlg_get_dlg_params(struct display_mode_lib *mode_lib,
        // Source
 //             dcc_en              = src.dcc;
        dual_plane = is_dual_plane((enum source_format_class)(src->source_format));
-       mode_422 = false; // TODO
        access_dir = (src->source_scan == dm_vert); // vp access direction: horizontal or vertical accessed
 //      bytes_per_element_l = get_bytes_per_element(source_format_class(src.source_format), 0);
 //      bytes_per_element_c = get_bytes_per_element(source_format_class(src.source_format), 1);
@@ -1148,13 +1145,8 @@ static void dml20_rq_dlg_get_dlg_params(struct display_mode_lib *mode_lib,
        dpte_row_height_l = rq_dlg_param->rq_l.dpte_row_height;
        dpte_row_height_c = rq_dlg_param->rq_c.dpte_row_height;
 
-       if (mode_422) {
-               swath_width_pixels_ub_l = swath_width_ub_l * 2;  // *2 for 2 pixel per element
-               swath_width_pixels_ub_c = swath_width_ub_c * 2;
-       } else {
-               swath_width_pixels_ub_l = swath_width_ub_l * 1;
-               swath_width_pixels_ub_c = swath_width_ub_c * 1;
-       }
+       swath_width_pixels_ub_l = swath_width_ub_l;
+       swath_width_pixels_ub_c = swath_width_ub_c;
 
        if (htaps_l <= 1)
                min_hratio_fact_l = 2.0;

diff --git a/drivers/gpu/drm/amd/display/dc/dml/dcn20/display_rq_dlg_calc_20v2.c b/drivers/gpu/drm/amd/display/dc/dml/dcn20/display_rq_dlg_calc_20v2.c
index f4bba1f2aeb6f3e8db3ffb4f738d14ca383e1be6..3d95bfa5aca23b25a41c93a6f1cfb4a2dfe524b7 100644 (file)
--- a/drivers/gpu/drm/amd/display/dc/dml/dcn20/display_rq_dlg_calc_20v2.c
+++ b/drivers/gpu/drm/amd/display/dc/dml/dcn20/display_rq_dlg_calc_20v2.c
@@ -688,12 +688,11 @@ static void get_surf_rq_param(struct display_mode_lib *mode_lib,
                const display_pipe_source_params_st *pipe_src_param,
                bool is_chroma)
 {
-       bool mode_422 = false;
        unsigned int vp_width = 0;
        unsigned int vp_height = 0;
        unsigned int data_pitch = 0;
        unsigned int meta_pitch = 0;
-       unsigned int ppe = mode_422 ? 2 : 1;
+       unsigned int ppe = 1;
 
        // TODO check if ppe apply for both luma and chroma in 422 case
        if (is_chroma) {
@@ -825,7 +824,6 @@ static void dml20v2_rq_dlg_get_dlg_params(struct display_mode_lib *mode_lib,
        double min_dst_y_ttu_vblank;
        unsigned int dlg_vblank_start;
        bool dual_plane;
-       bool mode_422;
        unsigned int access_dir;
        unsigned int vp_height_l;
        unsigned int vp_width_l;
@@ -972,7 +970,6 @@ static void dml20v2_rq_dlg_get_dlg_params(struct display_mode_lib *mode_lib,
        // Source
 //             dcc_en              = src.dcc;
        dual_plane = is_dual_plane((enum source_format_class)(src->source_format));
-       mode_422 = false; // TODO
        access_dir = (src->source_scan == dm_vert); // vp access direction: horizontal or vertical accessed
 //      bytes_per_element_l = get_bytes_per_element(source_format_class(src.source_format), 0);
 //      bytes_per_element_c = get_bytes_per_element(source_format_class(src.source_format), 1);
@@ -1149,13 +1146,8 @@ static void dml20v2_rq_dlg_get_dlg_params(struct display_mode_lib *mode_lib,
        dpte_row_height_l = rq_dlg_param->rq_l.dpte_row_height;
        dpte_row_height_c = rq_dlg_param->rq_c.dpte_row_height;
 
-       if (mode_422) {
-               swath_width_pixels_ub_l = swath_width_ub_l * 2;  // *2 for 2 pixel per element
-               swath_width_pixels_ub_c = swath_width_ub_c * 2;
-       } else {
-               swath_width_pixels_ub_l = swath_width_ub_l * 1;
-               swath_width_pixels_ub_c = swath_width_ub_c * 1;
-       }
+       swath_width_pixels_ub_l = swath_width_ub_l;
+       swath_width_pixels_ub_c = swath_width_ub_c;
 
        if (htaps_l <= 1)
                min_hratio_fact_l = 2.0;

diff --git a/drivers/gpu/drm/amd/display/dc/dml/dcn21/display_rq_dlg_calc_21.c b/drivers/gpu/drm/amd/display/dc/dml/dcn21/display_rq_dlg_calc_21.c
index c229a9edf82afccc784ba70dd3a91ac9597126cb..98502a4f0567267f52942e4d3fb4e3186fd285b7 100644 (file)
--- a/drivers/gpu/drm/amd/display/dc/dml/dcn21/display_rq_dlg_calc_21.c
+++ b/drivers/gpu/drm/amd/display/dc/dml/dcn21/display_rq_dlg_calc_21.c
@@ -694,12 +694,11 @@ static void get_surf_rq_param(
                const display_pipe_params_st *pipe_param,
                bool is_chroma)
 {
-       bool mode_422 = false;
        unsigned int vp_width = 0;
        unsigned int vp_height = 0;
        unsigned int data_pitch = 0;
        unsigned int meta_pitch = 0;
-       unsigned int ppe = mode_422 ? 2 : 1;
+       unsigned int ppe = 1;
 
        // FIXME check if ppe apply for both luma and chroma in 422 case
        if (is_chroma) {
@@ -868,7 +867,6 @@ static void dml_rq_dlg_get_dlg_params(
        double min_dst_y_ttu_vblank;
        unsigned int dlg_vblank_start;
        bool dual_plane;
-       bool mode_422;
        unsigned int access_dir;
        unsigned int vp_height_l;
        unsigned int vp_width_l;
@@ -1020,7 +1018,6 @@ static void dml_rq_dlg_get_dlg_params(
        // Source
        //             dcc_en              = src.dcc;
        dual_plane = is_dual_plane((enum source_format_class) (src->source_format));
-       mode_422 = false; // FIXME
        access_dir = (src->source_scan == dm_vert); // vp access direction: horizontal or vertical accessed
                                                    //      bytes_per_element_l = get_bytes_per_element(source_format_class(src.source_format), 0);
                                                    //      bytes_per_element_c = get_bytes_per_element(source_format_class(src.source_format), 1);
@@ -1197,13 +1194,8 @@ static void dml_rq_dlg_get_dlg_params(
        dpte_row_height_l = rq_dlg_param->rq_l.dpte_row_height;
        dpte_row_height_c = rq_dlg_param->rq_c.dpte_row_height;
 
-       if (mode_422) {
-               swath_width_pixels_ub_l = swath_width_ub_l * 2;  // *2 for 2 pixel per element
-               swath_width_pixels_ub_c = swath_width_ub_c * 2;
-       } else {
-               swath_width_pixels_ub_l = swath_width_ub_l * 1;
-               swath_width_pixels_ub_c = swath_width_ub_c * 1;
-       }
+       swath_width_pixels_ub_l = swath_width_ub_l;
+       swath_width_pixels_ub_c = swath_width_ub_c;
 
        if (hratio_l <= 1)
                min_hratio_fact_l = 2.0;

diff --git a/drivers/gpu/drm/amd/display/dc/dml/dcn30/display_rq_dlg_calc_30.c b/drivers/gpu/drm/amd/display/dc/dml/dcn30/display_rq_dlg_calc_30.c
index f3ee7baac7862046ba3d3259f3ddc8e00ec939df..b28fcc8608ff869a0ad2e7e7abb143bf8052beff 100644 (file)
--- a/drivers/gpu/drm/amd/display/dc/dml/dcn30/display_rq_dlg_calc_30.c
+++ b/drivers/gpu/drm/amd/display/dc/dml/dcn30/display_rq_dlg_calc_30.c
@@ -660,13 +660,12 @@ static void get_surf_rq_param(struct display_mode_lib *mode_lib,
        bool is_chroma,
        bool is_alpha)
 {
-       bool mode_422 = 0;
        unsigned int vp_width = 0;
        unsigned int vp_height = 0;
        unsigned int data_pitch = 0;
        unsigned int meta_pitch = 0;
        unsigned int surface_height = 0;
-       unsigned int ppe = mode_422 ? 2 : 1;
+       unsigned int ppe = 1;
 
        // FIXME check if ppe apply for both luma and chroma in 422 case
        if (is_chroma | is_alpha) {
@@ -934,7 +933,6 @@ static void dml_rq_dlg_get_dlg_params(struct display_mode_lib *mode_lib,
        double min_dst_y_ttu_vblank = 0;
        unsigned int dlg_vblank_start = 0;
        bool dual_plane = false;
-       bool mode_422 = false;
        unsigned int access_dir = 0;
        unsigned int vp_height_l = 0;
        unsigned int vp_width_l = 0;
@@ -1083,7 +1081,6 @@ static void dml_rq_dlg_get_dlg_params(struct display_mode_lib *mode_lib,
        // Source
        //                       dcc_en                   = src.dcc;
        dual_plane = is_dual_plane((enum source_format_class)(src->source_format));
-       mode_422 = false; // TODO
        access_dir = (src->source_scan == dm_vert); // vp access direction: horizontal or vertical accessed
        vp_height_l = src->viewport_height;
        vp_width_l = src->viewport_width;
@@ -1301,13 +1298,8 @@ static void dml_rq_dlg_get_dlg_params(struct display_mode_lib *mode_lib,
        dpte_row_height_l = rq_dlg_param.rq_l.dpte_row_height;
        dpte_row_height_c = rq_dlg_param.rq_c.dpte_row_height;
 
-       if (mode_422) {
-               swath_width_pixels_ub_l = swath_width_ub_l * 2;  // *2 for 2 pixel per element
-               swath_width_pixels_ub_c = swath_width_ub_c * 2;
-       } else {
-               swath_width_pixels_ub_l = swath_width_ub_l * 1;
-               swath_width_pixels_ub_c = swath_width_ub_c * 1;
-       }
+       swath_width_pixels_ub_l = swath_width_ub_l;
+       swath_width_pixels_ub_c = swath_width_ub_c;
 
        if (hratio_l <= 1)
                min_hratio_fact_l = 2.0;

diff --git a/drivers/gpu/drm/amd/display/dc/dml/dcn31/display_rq_dlg_calc_31.c b/drivers/gpu/drm/amd/display/dc/dml/dcn31/display_rq_dlg_calc_31.c
index b6d954d9aa00cd5b1ea64a7b04080ad4cc0f70c9..b57b095cd4a81485785c826b0db7773fc36bfe6a 100644 (file)
--- a/drivers/gpu/drm/amd/display/dc/dml/dcn31/display_rq_dlg_calc_31.c
+++ b/drivers/gpu/drm/amd/display/dc/dml/dcn31/display_rq_dlg_calc_31.c
@@ -655,13 +655,12 @@ static void get_surf_rq_param(
                bool is_chroma,
                bool is_alpha)
 {
-       bool mode_422 = 0;
        unsigned int vp_width = 0;
        unsigned int vp_height = 0;
        unsigned int data_pitch = 0;
        unsigned int meta_pitch = 0;
        unsigned int surface_height = 0;
-       unsigned int ppe = mode_422 ? 2 : 1;
+       unsigned int ppe = 1;
 
        // FIXME check if ppe apply for both luma and chroma in 422 case
        if (is_chroma | is_alpha) {
@@ -888,7 +887,6 @@ static void dml_rq_dlg_get_dlg_params(
        double min_ttu_vblank;
        unsigned int dlg_vblank_start;
        bool dual_plane;
-       bool mode_422;
        unsigned int access_dir;
        unsigned int vp_height_l;
        unsigned int vp_width_l;
@@ -1004,7 +1002,6 @@ static void dml_rq_dlg_get_dlg_params(
        // Prefetch Calc
        // Source
        dual_plane = is_dual_plane((enum source_format_class) (src->source_format));
-       mode_422 = 0;
        access_dir = (src->source_scan == dm_vert);     // vp access direction: horizontal or vertical accessed
        vp_height_l = src->viewport_height;
        vp_width_l = src->viewport_width;
@@ -1142,13 +1139,8 @@ static void dml_rq_dlg_get_dlg_params(
        dpte_row_height_l = rq_dlg_param->rq_l.dpte_row_height;
        dpte_row_height_c = rq_dlg_param->rq_c.dpte_row_height;
 
-       if (mode_422) {
-               swath_width_pixels_ub_l = swath_width_ub_l * 2;  // *2 for 2 pixel per element
-               swath_width_pixels_ub_c = swath_width_ub_c * 2;
-       } else {
-               swath_width_pixels_ub_l = swath_width_ub_l * 1;
-               swath_width_pixels_ub_c = swath_width_ub_c * 1;
-       }
+       swath_width_pixels_ub_l = swath_width_ub_l;
+       swath_width_pixels_ub_c = swath_width_ub_c;
 
        if (hratio_l <= 1)
                min_hratio_fact_l = 2.0;

diff --git a/drivers/gpu/drm/amd/display/dc/dml/dcn314/display_rq_dlg_calc_314.c b/drivers/gpu/drm/amd/display/dc/dml/dcn314/display_rq_dlg_calc_314.c
index 94975b0fa398fd542a1867a0e03df492d06fb052..61b3bebf24c96c808d52572edefc7e8fa396c301 100644 (file)
--- a/drivers/gpu/drm/amd/display/dc/dml/dcn314/display_rq_dlg_calc_314.c
+++ b/drivers/gpu/drm/amd/display/dc/dml/dcn314/display_rq_dlg_calc_314.c
@@ -743,13 +743,12 @@ static void get_surf_rq_param(
                bool is_chroma,
                bool is_alpha)
 {
-       bool mode_422 = 0;
        unsigned int vp_width = 0;
        unsigned int vp_height = 0;
        unsigned int data_pitch = 0;
        unsigned int meta_pitch = 0;
        unsigned int surface_height = 0;
-       unsigned int ppe = mode_422 ? 2 : 1;
+       unsigned int ppe = 1;
 
        // FIXME check if ppe apply for both luma and chroma in 422 case
        if (is_chroma | is_alpha) {
@@ -973,7 +972,6 @@ static void dml_rq_dlg_get_dlg_params(
        double min_ttu_vblank;
        unsigned int dlg_vblank_start;
        bool dual_plane;
-       bool mode_422;
        unsigned int access_dir;
        unsigned int vp_height_l;
        unsigned int vp_width_l;
@@ -1091,7 +1089,6 @@ static void dml_rq_dlg_get_dlg_params(
        // Prefetch Calc
        // Source
        dual_plane = is_dual_plane((enum source_format_class) (src->source_format));
-       mode_422 = 0;
        access_dir = (src->source_scan == dm_vert);     // vp access direction: horizontal or vertical accessed
        vp_height_l = src->viewport_height;
        vp_width_l = src->viewport_width;
@@ -1230,13 +1227,8 @@ static void dml_rq_dlg_get_dlg_params(
        dpte_row_height_l = rq_dlg_param->rq_l.dpte_row_height;
        dpte_row_height_c = rq_dlg_param->rq_c.dpte_row_height;
 
-       if (mode_422) {
-               swath_width_pixels_ub_l = swath_width_ub_l * 2;  // *2 for 2 pixel per element
-               swath_width_pixels_ub_c = swath_width_ub_c * 2;
-       } else {
-               swath_width_pixels_ub_l = swath_width_ub_l * 1;
-               swath_width_pixels_ub_c = swath_width_ub_c * 1;
-       }
+       swath_width_pixels_ub_l = swath_width_ub_l;
+       swath_width_pixels_ub_c = swath_width_ub_c;
 
        if (hratio_l <= 1)
                min_hratio_fact_l = 2.0;