struct davinci_nand_info *info = to_davinci_nand(nand_to_mtd(nand));
        void __iomem                    *addr = info->current_cs;
 
-       /* Did the control lines change? */
-       if (ctrl & NAND_CTRL_CHANGE) {
-               if ((ctrl & NAND_CTRL_CLE) == NAND_CTRL_CLE)
-                       addr += info->mask_cle;
-               else if ((ctrl & NAND_CTRL_ALE) == NAND_CTRL_ALE)
-                       addr += info->mask_ale;
-
-               nand->legacy.IO_ADDR_W = addr;
-       }
+       if (ctrl & NAND_CTRL_CLE)
+               addr += info->mask_cle;
+       else if (ctrl & NAND_CTRL_ALE)
+               addr += info->mask_ale;
 
        if (cmd != NAND_CMD_NONE)
-               iowrite8(cmd, nand->legacy.IO_ADDR_W);
+               iowrite8(cmd, addr);
 }
 
 static void nand_davinci_select_chip(struct nand_chip *nand, int chip)
        /* maybe kick in a second chipselect */
        if (chip > 0)
                info->current_cs += info->mask_chipsel;
-
-       info->chip.legacy.IO_ADDR_W = info->current_cs;
-       info->chip.legacy.IO_ADDR_R = info->chip.legacy.IO_ADDR_W;
 }
 
 /*----------------------------------------------------------------------*/
 static void nand_davinci_read_buf(struct nand_chip *chip, uint8_t *buf,
                                  int len)
 {
+       struct davinci_nand_info *info = to_davinci_nand(nand_to_mtd(chip));
+
        if ((0x03 & ((uintptr_t)buf)) == 0 && (0x03 & len) == 0)
-               ioread32_rep(chip->legacy.IO_ADDR_R, buf, len >> 2);
+               ioread32_rep(info->current_cs, buf, len >> 2);
        else if ((0x01 & ((uintptr_t)buf)) == 0 && (0x01 & len) == 0)
-               ioread16_rep(chip->legacy.IO_ADDR_R, buf, len >> 1);
+               ioread16_rep(info->current_cs, buf, len >> 1);
        else
-               ioread8_rep(chip->legacy.IO_ADDR_R, buf, len);
+               ioread8_rep(info->current_cs, buf, len);
 }
 
 static void nand_davinci_write_buf(struct nand_chip *chip, const uint8_t *buf,
                                   int len)
 {
+       struct davinci_nand_info *info = to_davinci_nand(nand_to_mtd(chip));
+
        if ((0x03 & ((uintptr_t)buf)) == 0 && (0x03 & len) == 0)
-               iowrite32_rep(chip->legacy.IO_ADDR_R, buf, len >> 2);
+               iowrite32_rep(info->current_cs, buf, len >> 2);
        else if ((0x01 & ((uintptr_t)buf)) == 0 && (0x01 & len) == 0)
-               iowrite16_rep(chip->legacy.IO_ADDR_R, buf, len >> 1);
+               iowrite16_rep(info->current_cs, buf, len >> 1);
        else
-               iowrite8_rep(chip->legacy.IO_ADDR_R, buf, len);
+               iowrite8_rep(info->current_cs, buf, len);
 }
 
 /*
        mtd->dev.parent         = &pdev->dev;
        nand_set_flash_node(&info->chip, pdev->dev.of_node);
 
-       info->chip.legacy.IO_ADDR_R     = vaddr;
-       info->chip.legacy.IO_ADDR_W     = vaddr;
        info->chip.legacy.chip_delay    = 0;
        info->chip.legacy.select_chip   = nand_davinci_select_chip;