drm/amd/display: blank otg before power gate front end.

Signed-off-by: Yongqiang Sun <yongqiang.sun@amd.com>
Reviewed-by: Tony Cheng <Tony.Cheng@amd.com>
Acked-by: Harry Wentland <Harry.Wentland@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>

diff --git a/drivers/gpu/drm/amd/display/dc/dcn10/dcn10_hw_sequencer.c b/drivers/gpu/drm/amd/display/dc/dcn10/dcn10_hw_sequencer.c
index d5d2398d92b87e3a3c2b83cb7d05fcf7233ca52d..ce48d81c444279147a66b2f1fd6835babf889290 100644 (file)
--- a/drivers/gpu/drm/amd/display/dc/dcn10/dcn10_hw_sequencer.c
+++ b/drivers/gpu/drm/amd/display/dc/dcn10/dcn10_hw_sequencer.c
@@ -2298,8 +2298,10 @@ static void dcn10_apply_ctx_for_surface(
                        struct pipe_ctx *old_pipe_ctx =
                                                        &dc->current_context->res_ctx.pipe_ctx[i];
 
-                       if (old_pipe_ctx->stream_res.tg && old_pipe_ctx->stream_res.tg->inst == be_idx)
+                       if (old_pipe_ctx->stream_res.tg && old_pipe_ctx->stream_res.tg->inst == be_idx) {
+                               old_pipe_ctx->stream_res.tg->funcs->set_blank(old_pipe_ctx->stream_res.tg, true);
                                dcn10_power_down_fe(dc, old_pipe_ctx->pipe_idx);
+                       }
                }
                return;
        }