if (buf)
                                buf[tp.byte] = read_rxram_slot_u8(qspi, slot);
                        dev_dbg(&qspi->pdev->dev, "RD %02x\n",
-                               buf ? buf[tp.byte] : 0xff);
+                               buf ? buf[tp.byte] : 0x0);
                } else {
                        u16 *buf = tp.trans->rx_buf;
 
                                buf[tp.byte / 2] = read_rxram_slot_u16(qspi,
                                                                      slot);
                        dev_dbg(&qspi->pdev->dev, "RD %04x\n",
-                               buf ? buf[tp.byte] : 0xffff);
+                               buf ? buf[tp.byte / 2] : 0x0);
                }
 
                update_qspi_trans_byte_count(qspi, &tp,
        while (!tstatus && slot < MSPI_NUM_CDRAM) {
                if (tp.trans->bits_per_word <= 8) {
                        const u8 *buf = tp.trans->tx_buf;
-                       u8 val = buf ? buf[tp.byte] : 0xff;
+                       u8 val = buf ? buf[tp.byte] : 0x00;
 
                        write_txram_slot_u8(qspi, slot, val);
                        dev_dbg(&qspi->pdev->dev, "WR %02x\n", val);
                } else {
                        const u16 *buf = tp.trans->tx_buf;
-                       u16 val = buf ? buf[tp.byte / 2] : 0xffff;
+                       u16 val = buf ? buf[tp.byte / 2] : 0x0000;
 
                        write_txram_slot_u16(qspi, slot, val);
                        dev_dbg(&qspi->pdev->dev, "WR %04x\n", val);