u32 saved_datain;
        u32 level_mask;
        u32 toggle_mask;
-       spinlock_t lock;
+       raw_spinlock_t lock;
        struct gpio_chip chip;
        struct clk *dbck;
        u32 mod_usage;
        if (!BANK_USED(bank))
                pm_runtime_get_sync(bank->dev);
 
-       spin_lock_irqsave(&bank->lock, flags);
+       raw_spin_lock_irqsave(&bank->lock, flags);
        retval = omap_set_gpio_triggering(bank, offset, type);
        if (retval)
                goto error;
        omap_gpio_init_irq(bank, offset);
        if (!omap_gpio_is_input(bank, offset)) {
-               spin_unlock_irqrestore(&bank->lock, flags);
+               raw_spin_unlock_irqrestore(&bank->lock, flags);
                retval = -EINVAL;
                goto error;
        }
-       spin_unlock_irqrestore(&bank->lock, flags);
+       raw_spin_unlock_irqrestore(&bank->lock, flags);
 
        if (type & (IRQ_TYPE_LEVEL_LOW | IRQ_TYPE_LEVEL_HIGH))
                irq_set_handler_locked(d, handle_level_irq);
                return -EINVAL;
        }
 
-       spin_lock_irqsave(&bank->lock, flags);
+       raw_spin_lock_irqsave(&bank->lock, flags);
        if (enable)
                bank->context.wake_en |= gpio_bit;
        else
                bank->context.wake_en &= ~gpio_bit;
 
        writel_relaxed(bank->context.wake_en, bank->base + bank->regs->wkup_en);
-       spin_unlock_irqrestore(&bank->lock, flags);
+       raw_spin_unlock_irqrestore(&bank->lock, flags);
 
        return 0;
 }
        if (!BANK_USED(bank))
                pm_runtime_get_sync(bank->dev);
 
-       spin_lock_irqsave(&bank->lock, flags);
+       raw_spin_lock_irqsave(&bank->lock, flags);
        omap_enable_gpio_module(bank, offset);
        bank->mod_usage |= BIT(offset);
-       spin_unlock_irqrestore(&bank->lock, flags);
+       raw_spin_unlock_irqrestore(&bank->lock, flags);
 
        return 0;
 }
        struct gpio_bank *bank = container_of(chip, struct gpio_bank, chip);
        unsigned long flags;
 
-       spin_lock_irqsave(&bank->lock, flags);
+       raw_spin_lock_irqsave(&bank->lock, flags);
        bank->mod_usage &= ~(BIT(offset));
        if (!LINE_USED(bank->irq_usage, offset)) {
                omap_set_gpio_direction(bank, offset, 1);
                omap_clear_gpio_debounce(bank, offset);
        }
        omap_disable_gpio_module(bank, offset);
-       spin_unlock_irqrestore(&bank->lock, flags);
+       raw_spin_unlock_irqrestore(&bank->lock, flags);
 
        /*
         * If this is the last gpio to be freed in the bank,
        if (!BANK_USED(bank))
                pm_runtime_get_sync(bank->dev);
 
-       spin_lock_irqsave(&bank->lock, flags);
+       raw_spin_lock_irqsave(&bank->lock, flags);
 
        if (!LINE_USED(bank->mod_usage, offset))
                omap_set_gpio_direction(bank, offset, 1);
        omap_enable_gpio_module(bank, offset);
        bank->irq_usage |= BIT(offset);
 
-       spin_unlock_irqrestore(&bank->lock, flags);
+       raw_spin_unlock_irqrestore(&bank->lock, flags);
        omap_gpio_unmask_irq(d);
 
        return 0;
 err:
-       spin_unlock_irqrestore(&bank->lock, flags);
+       raw_spin_unlock_irqrestore(&bank->lock, flags);
        if (!BANK_USED(bank))
                pm_runtime_put(bank->dev);
        return -EINVAL;
        unsigned long flags;
        unsigned offset = d->hwirq;
 
-       spin_lock_irqsave(&bank->lock, flags);
+       raw_spin_lock_irqsave(&bank->lock, flags);
        bank->irq_usage &= ~(BIT(offset));
        omap_set_gpio_irqenable(bank, offset, 0);
        omap_clear_gpio_irqstatus(bank, offset);
        if (!LINE_USED(bank->mod_usage, offset))
                omap_clear_gpio_debounce(bank, offset);
        omap_disable_gpio_module(bank, offset);
-       spin_unlock_irqrestore(&bank->lock, flags);
+       raw_spin_unlock_irqrestore(&bank->lock, flags);
 
        /*
         * If this is the last IRQ to be freed in the bank,
        unsigned offset = d->hwirq;
        unsigned long flags;
 
-       spin_lock_irqsave(&bank->lock, flags);
+       raw_spin_lock_irqsave(&bank->lock, flags);
        omap_set_gpio_irqenable(bank, offset, 0);
        omap_set_gpio_triggering(bank, offset, IRQ_TYPE_NONE);
-       spin_unlock_irqrestore(&bank->lock, flags);
+       raw_spin_unlock_irqrestore(&bank->lock, flags);
 }
 
 static void omap_gpio_unmask_irq(struct irq_data *d)
        u32 trigger = irqd_get_trigger_type(d);
        unsigned long flags;
 
-       spin_lock_irqsave(&bank->lock, flags);
+       raw_spin_lock_irqsave(&bank->lock, flags);
        if (trigger)
                omap_set_gpio_triggering(bank, offset, trigger);
 
        }
 
        omap_set_gpio_irqenable(bank, offset, 1);
-       spin_unlock_irqrestore(&bank->lock, flags);
+       raw_spin_unlock_irqrestore(&bank->lock, flags);
 }
 
 /*---------------------------------------------------------------------*/
                                        OMAP_MPUIO_GPIO_MASKIT / bank->stride;
        unsigned long           flags;
 
-       spin_lock_irqsave(&bank->lock, flags);
+       raw_spin_lock_irqsave(&bank->lock, flags);
        writel_relaxed(0xffff & ~bank->context.wake_en, mask_reg);
-       spin_unlock_irqrestore(&bank->lock, flags);
+       raw_spin_unlock_irqrestore(&bank->lock, flags);
 
        return 0;
 }
                                        OMAP_MPUIO_GPIO_MASKIT / bank->stride;
        unsigned long           flags;
 
-       spin_lock_irqsave(&bank->lock, flags);
+       raw_spin_lock_irqsave(&bank->lock, flags);
        writel_relaxed(bank->context.wake_en, mask_reg);
-       spin_unlock_irqrestore(&bank->lock, flags);
+       raw_spin_unlock_irqrestore(&bank->lock, flags);
 
        return 0;
 }
 
        bank = container_of(chip, struct gpio_bank, chip);
        reg = bank->base + bank->regs->direction;
-       spin_lock_irqsave(&bank->lock, flags);
+       raw_spin_lock_irqsave(&bank->lock, flags);
        dir = !!(readl_relaxed(reg) & BIT(offset));
-       spin_unlock_irqrestore(&bank->lock, flags);
+       raw_spin_unlock_irqrestore(&bank->lock, flags);
        return dir;
 }
 
        unsigned long flags;
 
        bank = container_of(chip, struct gpio_bank, chip);
-       spin_lock_irqsave(&bank->lock, flags);
+       raw_spin_lock_irqsave(&bank->lock, flags);
        omap_set_gpio_direction(bank, offset, 1);
-       spin_unlock_irqrestore(&bank->lock, flags);
+       raw_spin_unlock_irqrestore(&bank->lock, flags);
        return 0;
 }
 
        unsigned long flags;
 
        bank = container_of(chip, struct gpio_bank, chip);
-       spin_lock_irqsave(&bank->lock, flags);
+       raw_spin_lock_irqsave(&bank->lock, flags);
        bank->set_dataout(bank, offset, value);
        omap_set_gpio_direction(bank, offset, 0);
-       spin_unlock_irqrestore(&bank->lock, flags);
+       raw_spin_unlock_irqrestore(&bank->lock, flags);
        return 0;
 }
 
 
        bank = container_of(chip, struct gpio_bank, chip);
 
-       spin_lock_irqsave(&bank->lock, flags);
+       raw_spin_lock_irqsave(&bank->lock, flags);
        omap2_set_gpio_debounce(bank, offset, debounce);
-       spin_unlock_irqrestore(&bank->lock, flags);
+       raw_spin_unlock_irqrestore(&bank->lock, flags);
 
        return 0;
 }
        unsigned long flags;
 
        bank = container_of(chip, struct gpio_bank, chip);
-       spin_lock_irqsave(&bank->lock, flags);
+       raw_spin_lock_irqsave(&bank->lock, flags);
        bank->set_dataout(bank, offset, value);
-       spin_unlock_irqrestore(&bank->lock, flags);
+       raw_spin_unlock_irqrestore(&bank->lock, flags);
 }
 
 /*---------------------------------------------------------------------*/
        else
                bank->set_dataout = omap_set_gpio_dataout_mask;
 
-       spin_lock_init(&bank->lock);
+       raw_spin_lock_init(&bank->lock);
 
        /* Static mapping, never released */
        res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
        unsigned long flags;
        u32 wake_low, wake_hi;
 
-       spin_lock_irqsave(&bank->lock, flags);
+       raw_spin_lock_irqsave(&bank->lock, flags);
 
        /*
         * Only edges can generate a wakeup event to the PRCM.
                                bank->get_context_loss_count(bank->dev);
 
        omap_gpio_dbck_disable(bank);
-       spin_unlock_irqrestore(&bank->lock, flags);
+       raw_spin_unlock_irqrestore(&bank->lock, flags);
 
        return 0;
 }
        unsigned long flags;
        int c;
 
-       spin_lock_irqsave(&bank->lock, flags);
+       raw_spin_lock_irqsave(&bank->lock, flags);
 
        /*
         * On the first resume during the probe, the context has not
                        if (c != bank->context_loss_count) {
                                omap_gpio_restore_context(bank);
                        } else {
-                               spin_unlock_irqrestore(&bank->lock, flags);
+                               raw_spin_unlock_irqrestore(&bank->lock, flags);
                                return 0;
                        }
                }
        }
 
        if (!bank->workaround_enabled) {
-               spin_unlock_irqrestore(&bank->lock, flags);
+               raw_spin_unlock_irqrestore(&bank->lock, flags);
                return 0;
        }
 
        }
 
        bank->workaround_enabled = false;
-       spin_unlock_irqrestore(&bank->lock, flags);
+       raw_spin_unlock_irqrestore(&bank->lock, flags);
 
        return 0;
 }