int (*setup_tc)(struct hnae3_handle *handle, u8 tc);
        int (*reset_notify)(struct hnae3_handle *handle,
                            enum hnae3_reset_notify_type type);
+       enum hnae3_reset_type (*process_hw_error)(struct hnae3_handle *handle);
 };
 
 #define HNAE3_CLIENT_NAME_LENGTH 16
        int (*restore_fd_rules)(struct hnae3_handle *handle);
        void (*enable_fd)(struct hnae3_handle *handle, bool enable);
        pci_ers_result_t (*process_hw_error)(struct hnae3_ae_dev *ae_dev);
+       bool (*get_hw_reset_stat)(struct hnae3_handle *handle);
+       bool (*ae_dev_resetting)(struct hnae3_handle *handle);
+       unsigned long (*ae_dev_reset_cnt)(struct hnae3_handle *handle);
 };
 
 struct hnae3_dcb_ops {
        void __iomem *roce_io_base;
        int base_vector;
        int num_vectors;
+
+       /* The below attributes defined for RoCE client, hnae3 gives
+        * initial values to them, and RoCE client can modify and use
+        * them.
+        */
+       unsigned long reset_state;
+       unsigned long instance_state;
+       unsigned long state;
 };
 
 struct hnae3_unic_private_info {
 
         * know if device is undergoing reset
         */
        ae_dev->reset_type = hdev->reset_type;
+       hdev->reset_count++;
        /* perform reset of the stack & ae device for a client */
        handle = &hdev->vport[0].nic;
        rtnl_lock();
        return 0;
 }
 
+static bool hclge_get_hw_reset_stat(struct hnae3_handle *handle)
+{
+       struct hclge_vport *vport = hclge_get_vport(handle);
+       struct hclge_dev *hdev = vport->back;
+
+       return hclge_read_dev(&hdev->hw, HCLGE_GLOBAL_RESET_REG) ||
+              hclge_read_dev(&hdev->hw, HCLGE_FUN_RST_ING);
+}
+
+static bool hclge_ae_dev_resetting(struct hnae3_handle *handle)
+{
+       struct hclge_vport *vport = hclge_get_vport(handle);
+       struct hclge_dev *hdev = vport->back;
+
+       return test_bit(HCLGE_STATE_RST_HANDLING, &hdev->state);
+}
+
+static unsigned long hclge_ae_dev_reset_cnt(struct hnae3_handle *handle)
+{
+       struct hclge_vport *vport = hclge_get_vport(handle);
+       struct hclge_dev *hdev = vport->back;
+
+       return hdev->reset_count;
+}
+
 static void hclge_enable_fd(struct hnae3_handle *handle, bool enable)
 {
        struct hclge_vport *vport = hclge_get_vport(handle);
        .restore_fd_rules = hclge_restore_fd_entries,
        .enable_fd = hclge_enable_fd,
        .process_hw_error = hclge_process_ras_hw_error,
+       .get_hw_reset_stat = hclge_get_hw_reset_stat,
+       .ae_dev_resetting = hclge_ae_dev_resetting,
+       .ae_dev_reset_cnt = hclge_ae_dev_reset_cnt,
 };
 
 static struct hnae3_ae_algo ae_algo = {
 
        unsigned long default_reset_request;
        unsigned long reset_request;    /* reset has been requested */
        unsigned long reset_pending;    /* client rst is pending to be served */
+       unsigned long reset_count;      /* the number of reset has been done */
        u32 fw_version;
        u16 num_vmdq_vport;             /* Num vmdq vport this PF has set up */
        u16 num_tqps;                   /* Num task queue pairs of this PF */
 
 {
        int ret;
 
+       hdev->reset_count++;
        rtnl_lock();
 
        /* bring down the nic to stop any ongoing TX/RX */
                *media_type = hdev->hw.mac.media_type;
 }
 
+static bool hclgevf_get_hw_reset_stat(struct hnae3_handle *handle)
+{
+       struct hclgevf_dev *hdev = hclgevf_ae_get_hdev(handle);
+
+       return !!hclgevf_read_dev(&hdev->hw, HCLGEVF_FUN_RST_ING);
+}
+
+static bool hclgevf_ae_dev_resetting(struct hnae3_handle *handle)
+{
+       struct hclgevf_dev *hdev = hclgevf_ae_get_hdev(handle);
+
+       return test_bit(HCLGEVF_STATE_RST_HANDLING, &hdev->state);
+}
+
+static unsigned long hclgevf_ae_dev_reset_cnt(struct hnae3_handle *handle)
+{
+       struct hclgevf_dev *hdev = hclgevf_ae_get_hdev(handle);
+
+       return hdev->reset_count;
+}
+
 static const struct hnae3_ae_ops hclgevf_ops = {
        .init_ae_dev = hclgevf_init_ae_dev,
        .uninit_ae_dev = hclgevf_uninit_ae_dev,
        .get_status = hclgevf_get_status,
        .get_ksettings_an_result = hclgevf_get_ksettings_an_result,
        .get_media_type = hclgevf_get_media_type,
+       .get_hw_reset_stat = hclgevf_get_hw_reset_stat,
+       .ae_dev_resetting = hclgevf_ae_dev_resetting,
+       .ae_dev_reset_cnt = hclgevf_ae_dev_reset_cnt,
 };
 
 static struct hnae3_ae_algo ae_algovf = {
 
 #define HCLGEVF_RESET_REQUESTED                0
 #define HCLGEVF_RESET_PENDING          1
        unsigned long reset_state;      /* requested, pending */
+       unsigned long reset_count;      /* the number of reset has been done */
        u32 reset_attempts;
 
        u32 fw_version;