}
 #endif
 
+       /* Disable vblank IRQs aggressively for power-saving. */
+       adev_to_drm(adev)->vblank_disable_immediate = true;
+
        /* loops over all connectors on the board */
        for (i = 0; i < link_cnt; i++) {
                struct dc_link *link = NULL;
                                update_connector_ext_caps(aconnector);
                        if (psr_feature_enabled)
                                amdgpu_dm_set_psr_caps(link);
+
+                       /* TODO: Fix vblank control helpers to delay PSR entry to allow this when
+                        * PSR is also supported.
+                        */
+                       if (link->psr_settings.psr_feature_enabled)
+                               adev_to_drm(adev)->vblank_disable_immediate = false;
                }
 
 
        }
 
-       /*
-        * Disable vblank IRQs aggressively for power-saving.
-        *
-        * TODO: Fix vblank control helpers to delay PSR entry to allow this when PSR
-        * is also supported.
-        */
-       adev_to_drm(adev)->vblank_disable_immediate = !psr_feature_enabled;
-
        /* Software is initialized. Now we can register interrupt handlers. */
        switch (adev->asic_type) {
 #if defined(CONFIG_DRM_AMD_DC_SI)