--- /dev/null
+# SPDX-License-Identifier: GPL-2.0-or-later
+
+#
+# Nordic nRF54L series
+#
+# Arm Cortex-M33 processor with RISC-V coprocessor
+#
+# The device uses resistive RAM (RRAM) as non-volatile memory.
+#
+
+if { [info exists CHIPNAME] } {
+ set _CHIPNAME $CHIPNAME
+} else {
+ set _CHIPNAME nrf54l
+}
+
+# Work-area is a space in RAM used for flash programming, by default use 16 KiB.
+if { [info exists WORKAREASIZE] } {
+ set _WORKAREASIZE $WORKAREASIZE
+} else {
+ set _WORKAREASIZE 0x4000
+}
+
+if { [info exists CPUTAPID] } {
+ set _CPUTAPID $CPUTAPID
+} else {
+ set _CPUTAPID 0x6ba02477
+}
+
+transport select swd
+
+swd newdap $_CHIPNAME cpu -expected-id $_CPUTAPID
+dap create $_CHIPNAME.dap -chain-position $_CHIPNAME.cpu
+
+set _TARGETNAME $_CHIPNAME.cpu
+target create $_TARGETNAME cortex_m -dap $_CHIPNAME.dap -ap-num 0
+
+$_TARGETNAME configure -work-area-phys 0x20000000 -work-area-size $_WORKAREASIZE -work-area-backup 0
+
+# Create target for the control access port (CTRL-AP).
+target create $_CHIPNAME.ctrl mem_ap -dap $_CHIPNAME.dap -ap-num 1
+
+adapter speed 1000
+
+# Use main processor as default target.
+targets $_TARGETNAME
+
+if {![using_hla]} {
+ $_TARGETNAME cortex_m reset_config sysresetreq
+}