arm64: dts: exynosautov920: add initial CMU clock nodes in ExynosAuto v920

Add cmu_top, cmu_peric0 clock nodes and
switch USI clocks instead of dummy fixed-rate-clock.

Signed-off-by: Sunyeal Hong <sunyeal.hong@samsung.com>
Link: https://lore.kernel.org/r/20240821232652.1077701-3-sunyeal.hong@samsung.com
Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>

diff --git a/arch/arm64/boot/dts/exynos/exynosautov920.dtsi b/arch/arm64/boot/dts/exynos/exynosautov920.dtsi
index c1c8566d74f5978a52e7c2f898749b97288ff4b5..91882b37fdb32b2666400355c477dcf51a4080cd 100644 (file)
--- a/arch/arm64/boot/dts/exynos/exynosautov920.dtsi
+++ b/arch/arm64/boot/dts/exynos/exynosautov920.dtsi
@@ -6,6 +6,7 @@
  *
  */
 
+#include <dt-bindings/clock/samsung,exynosautov920.h>
 #include <dt-bindings/interrupt-controller/arm-gic.h>
 #include <dt-bindings/soc/samsung,exynos-usi.h>
 
@@ -38,17 +39,6 @@
                clock-output-names = "oscclk";
        };
 
-       /*
-        * FIXME: Keep the stub clock for serial driver, until proper clock
-        * driver is implemented.
-        */
-       clock_usi: clock-usi {
-               compatible = "fixed-clock";
-               #clock-cells = <0>;
-               clock-frequency = <200000000>;
-               clock-output-names = "usi";
-       };
-
        cpus: cpus {
                #address-cells = <2>;
                #size-cells = <0>;
@@ -192,6 +182,19 @@
                        interrupts = <GIC_PPI 9 IRQ_TYPE_LEVEL_HIGH>;
                };
 
+               cmu_peric0: clock-controller@10800000 {
+                       compatible = "samsung,exynosautov920-cmu-peric0";
+                       reg = <0x10800000 0x8000>;
+                       #clock-cells = <1>;
+
+                       clocks = <&xtcxo>,
+                                <&cmu_top DOUT_CLKCMU_PERIC0_NOC>,
+                                <&cmu_top DOUT_CLKCMU_PERIC0_IP>;
+                       clock-names = "oscclk",
+                                     "noc",
+                                     "ip";
+               };
+
                syscon_peric0: syscon@10820000 {
                        compatible = "samsung,exynosautov920-peric0-sysreg",
                                     "syscon";
@@ -213,7 +216,8 @@
                        #address-cells = <1>;
                        #size-cells = <1>;
                        ranges;
-                       clocks = <&clock_usi>, <&clock_usi>;
+                       clocks = <&cmu_peric0 CLK_MOUT_PERIC0_NOC_USER>,
+                                <&cmu_peric0 CLK_DOUT_PERIC0_USI00_USI>;
                        clock-names = "pclk", "ipclk";
                        status = "disabled";
 
@@ -224,7 +228,8 @@
                                interrupts = <GIC_SPI 764 IRQ_TYPE_LEVEL_HIGH>;
                                pinctrl-names = "default";
                                pinctrl-0 = <&uart0_bus>;
-                               clocks = <&clock_usi>, <&clock_usi>;
+                               clocks = <&cmu_peric0 CLK_MOUT_PERIC0_NOC_USER>,
+                                        <&cmu_peric0 CLK_DOUT_PERIC0_USI00_USI>;
                                clock-names = "uart", "clk_uart_baud0";
                                samsung,uart-fifosize = <256>;
                                status = "disabled";
@@ -254,6 +259,15 @@
                        interrupts = <GIC_SPI 781 IRQ_TYPE_LEVEL_HIGH>;
                };
 
+               cmu_top: clock-controller@11000000 {
+                       compatible = "samsung,exynosautov920-cmu-top";
+                       reg = <0x11000000 0x8000>;
+                       #clock-cells = <1>;
+
+                       clocks = <&xtcxo>;
+                       clock-names = "oscclk";
+               };
+
                pinctrl_alive: pinctrl@11850000 {
                        compatible = "samsung,exynosautov920-pinctrl";
                        reg = <0x11850000 0x10000>;