/* Setup SGMIISYS with the determined property */
                if (state->interface != PHY_INTERFACE_MODE_SGMII)
                        err = mtk_sgmii_setup_mode_force(eth->sgmii, sid,
-                                                        state);
+                                                        state->interface);
                else if (phylink_autoneg_inband(mode))
                        err = mtk_sgmii_setup_mode_an(eth->sgmii, sid);
 
 
                   u32 ana_rgc3);
 int mtk_sgmii_setup_mode_an(struct mtk_sgmii *ss, int id);
 int mtk_sgmii_setup_mode_force(struct mtk_sgmii *ss, int id,
-                              const struct phylink_link_state *state);
+                              phy_interface_t interface);
 void mtk_sgmii_link_up(struct mtk_sgmii *ss, int id, int speed, int duplex);
 void mtk_sgmii_restart_an(struct mtk_eth *eth, int mac_id);
 
 
  * fixed speed.
  */
 int mtk_sgmii_setup_mode_force(struct mtk_sgmii *ss, int id,
-                              const struct phylink_link_state *state)
+                              phy_interface_t interface)
 {
        unsigned int val;
 
 
        regmap_read(ss->regmap[id], ss->ana_rgc3, &val);
        val &= ~RG_PHY_SPEED_MASK;
-       if (state->interface == PHY_INTERFACE_MODE_2500BASEX)
+       if (interface == PHY_INTERFACE_MODE_2500BASEX)
                val |= RG_PHY_SPEED_3_125G;
        regmap_write(ss->regmap[id], ss->ana_rgc3, val);