]> www.infradead.org Git - users/jedix/linux-maple.git/commitdiff
arm64: tegra: Drop remaining serial clock-names and reset-names
authorAaron Kling <webgeek1234@gmail.com>
Tue, 29 Apr 2025 01:51:47 +0000 (20:51 -0500)
committerThierry Reding <treding@nvidia.com>
Thu, 8 May 2025 20:58:03 +0000 (22:58 +0200)
The referenced commit only removed some of the names, missing all that
weren't in use at the time. The commit removes the rest.

Fixes: 71de0a054d0e ("arm64: tegra: Drop serial clock-names and reset-names")
Signed-off-by: Aaron Kling <webgeek1234@gmail.com>
Link: https://lore.kernel.org/r/20250428-tegra-serial-fixes-v1-1-4f47c5d85bf6@gmail.com
Signed-off-by: Thierry Reding <treding@nvidia.com>
arch/arm64/boot/dts/nvidia/tegra186.dtsi
arch/arm64/boot/dts/nvidia/tegra194.dtsi

index 2b3bb5d0af17bd521f87db0484fcbe943dd1a797..f0b7949df92c0583d0e710e5e2b93818434a913f 100644 (file)
                reg-shift = <2>;
                interrupts = <GIC_SPI 113 IRQ_TYPE_LEVEL_HIGH>;
                clocks = <&bpmp TEGRA186_CLK_UARTB>;
-               clock-names = "serial";
                resets = <&bpmp TEGRA186_RESET_UARTB>;
-               reset-names = "serial";
                status = "disabled";
        };
 
                reg-shift = <2>;
                interrupts = <GIC_SPI 115 IRQ_TYPE_LEVEL_HIGH>;
                clocks = <&bpmp TEGRA186_CLK_UARTD>;
-               clock-names = "serial";
                resets = <&bpmp TEGRA186_RESET_UARTD>;
-               reset-names = "serial";
                status = "disabled";
        };
 
                reg-shift = <2>;
                interrupts = <GIC_SPI 116 IRQ_TYPE_LEVEL_HIGH>;
                clocks = <&bpmp TEGRA186_CLK_UARTE>;
-               clock-names = "serial";
                resets = <&bpmp TEGRA186_RESET_UARTE>;
-               reset-names = "serial";
                status = "disabled";
        };
 
                reg-shift = <2>;
                interrupts = <GIC_SPI 117 IRQ_TYPE_LEVEL_HIGH>;
                clocks = <&bpmp TEGRA186_CLK_UARTF>;
-               clock-names = "serial";
                resets = <&bpmp TEGRA186_RESET_UARTF>;
-               reset-names = "serial";
                status = "disabled";
        };
 
                reg-shift = <2>;
                interrupts = <GIC_SPI 114 IRQ_TYPE_LEVEL_HIGH>;
                clocks = <&bpmp TEGRA186_CLK_UARTC>;
-               clock-names = "serial";
                resets = <&bpmp TEGRA186_RESET_UARTC>;
-               reset-names = "serial";
                status = "disabled";
        };
 
                reg-shift = <2>;
                interrupts = <GIC_SPI 118 IRQ_TYPE_LEVEL_HIGH>;
                clocks = <&bpmp TEGRA186_CLK_UARTG>;
-               clock-names = "serial";
                resets = <&bpmp TEGRA186_RESET_UARTG>;
-               reset-names = "serial";
                status = "disabled";
        };
 
index 33f92b77cd9d9e530eae87a4bb8ba61993ceffeb..c3695077478514708933934f06f25ef7dbe6f923 100644 (file)
                        reg-shift = <2>;
                        interrupts = <GIC_SPI 115 IRQ_TYPE_LEVEL_HIGH>;
                        clocks = <&bpmp TEGRA194_CLK_UARTD>;
-                       clock-names = "serial";
                        resets = <&bpmp TEGRA194_RESET_UARTD>;
-                       reset-names = "serial";
                        status = "disabled";
                };
 
                        reg-shift = <2>;
                        interrupts = <GIC_SPI 116 IRQ_TYPE_LEVEL_HIGH>;
                        clocks = <&bpmp TEGRA194_CLK_UARTE>;
-                       clock-names = "serial";
                        resets = <&bpmp TEGRA194_RESET_UARTE>;
-                       reset-names = "serial";
                        status = "disabled";
                };
 
                        reg-shift = <2>;
                        interrupts = <GIC_SPI 117 IRQ_TYPE_LEVEL_HIGH>;
                        clocks = <&bpmp TEGRA194_CLK_UARTF>;
-                       clock-names = "serial";
                        resets = <&bpmp TEGRA194_RESET_UARTF>;
-                       reset-names = "serial";
                        status = "disabled";
                };
 
                        reg-shift = <2>;
                        interrupts = <GIC_SPI 207 IRQ_TYPE_LEVEL_HIGH>;
                        clocks = <&bpmp TEGRA194_CLK_UARTH>;
-                       clock-names = "serial";
                        resets = <&bpmp TEGRA194_RESET_UARTH>;
-                       reset-names = "serial";
                        status = "disabled";
                };
 
                        reg-shift = <2>;
                        interrupts = <GIC_SPI 114 IRQ_TYPE_LEVEL_HIGH>;
                        clocks = <&bpmp TEGRA194_CLK_UARTC>;
-                       clock-names = "serial";
                        resets = <&bpmp TEGRA194_RESET_UARTC>;
-                       reset-names = "serial";
                        status = "disabled";
                };
 
                        reg-shift = <2>;
                        interrupts = <GIC_SPI 118 IRQ_TYPE_LEVEL_HIGH>;
                        clocks = <&bpmp TEGRA194_CLK_UARTG>;
-                       clock-names = "serial";
                        resets = <&bpmp TEGRA194_RESET_UARTG>;
-                       reset-names = "serial";
                        status = "disabled";
                };