drm/amd/display: Check for dmcu initialization before calling dmcu

[Why]
DMCU firmware is not required - the system is expected to run
fine without it.  Therefore, wherever dmcu functions could be
called, dmcu initialization shoudl be checked

[How]
Use the helpful hook dmcu_funcs->is_dmcu_initialized

Signed-off-by: David Francis <David.Francis@amd.com>
Reviewed-by: Hersen Wu <hersenxs.wu@amd.com>
Acked-by: Bhawanpreet Lakha <Bhawanpreet.Lakha@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>

diff --git a/drivers/gpu/drm/amd/display/dc/core/dc_link.c b/drivers/gpu/drm/amd/display/dc/core/dc_link.c
index 7ee9c033acbda70f302bdb5367683c7cd8823e2f..fe557e7142a1a29b5e37b3fa479a7b4c2265005c 100644 (file)
--- a/drivers/gpu/drm/amd/display/dc/core/dc_link.c
+++ b/drivers/gpu/drm/amd/display/dc/core/dc_link.c
@@ -2218,7 +2218,7 @@ bool dc_link_set_psr_enable(const struct dc_link *link, bool enable, bool wait)
        struct dc  *core_dc = link->ctx->dc;
        struct dmcu *dmcu = core_dc->res_pool->dmcu;
 
-       if (dmcu != NULL && link->psr_enabled)
+       if ((dmcu != NULL && dmcu->funcs->is_dmcu_initialized(dmcu)) && link->psr_enabled)
                dmcu->funcs->set_psr_enable(dmcu, enable, wait);
 
        return true;

diff --git a/drivers/gpu/drm/amd/display/dc/dce/dce_clk_mgr.c b/drivers/gpu/drm/amd/display/dc/dce/dce_clk_mgr.c
index 888d7129022e9a49caa66918aa369fc1f782d4f3..56f598567f0bdd2fb97e8505319855e5522f0756 100644 (file)
--- a/drivers/gpu/drm/amd/display/dc/dce/dce_clk_mgr.c
+++ b/drivers/gpu/drm/amd/display/dc/dce/dce_clk_mgr.c
@@ -277,7 +277,8 @@ static int dce_set_clock(
        if (requested_clk_khz == 0)
                clk_mgr_dce->cur_min_clks_state = DM_PP_CLOCKS_STATE_NOMINAL;
 
-       dmcu->funcs->set_psr_wait_loop(dmcu, actual_clock / 1000 / 7);
+       if (dmcu && dmcu->funcs->is_dmcu_initialized(dmcu))
+               dmcu->funcs->set_psr_wait_loop(dmcu, actual_clock / 1000 / 7);
 
        return actual_clock;
 }
@@ -324,9 +325,11 @@ int dce112_set_clock(struct clk_mgr *clk_mgr, int requested_clk_khz)
        bp->funcs->set_dce_clock(bp, &dce_clk_params);
 
        if (!IS_FPGA_MAXIMUS_DC(core_dc->ctx->dce_environment)) {
-               if (clk_mgr_dce->dfs_bypass_disp_clk != actual_clock)
-                       dmcu->funcs->set_psr_wait_loop(dmcu,
-                                       actual_clock / 1000 / 7);
+               if (dmcu && dmcu->funcs->is_dmcu_initialized(dmcu)) {
+                       if (clk_mgr_dce->dfs_bypass_disp_clk != actual_clock)
+                               dmcu->funcs->set_psr_wait_loop(dmcu,
+                                               actual_clock / 1000 / 7);
+               }
        }
 
        clk_mgr_dce->dfs_bypass_disp_clk = actual_clock;