Instead of relying on the tiling attached to a buffer object, make sure
to set the proper tiling for linear buffers.
Signed-off-by: Thierry Reding <treding@nvidia.com>
        uint64_t modifier = fb->base.modifier;
 
        switch (modifier) {
+       case DRM_FORMAT_MOD_LINEAR:
+               tiling->mode = TEGRA_BO_TILING_MODE_PITCH;
+               tiling->value = 0;
+               break;
+
        case DRM_FORMAT_MOD_NVIDIA_TEGRA_TILED:
                tiling->mode = TEGRA_BO_TILING_MODE_TILED;
                tiling->value = 0;
                break;
 
        default:
-               /* TODO: handle YUV formats? */
-               *tiling = fb->planes[0]->tiling;
-               break;
+               return -EINVAL;
        }
 
        return 0;