struct regmap *regmap;
        struct clk *pclk;
        struct clk *gclk;
-       struct clk *aclk;
        int irq;
        const struct atmel_classd_pdata *pdata;
 };
 {
        struct snd_soc_pcm_runtime *rtd = substream->private_data;
        struct atmel_classd *dd = snd_soc_card_get_drvdata(rtd->card);
-       int ret;
-
-       ret = clk_prepare_enable(dd->aclk);
-       if (ret)
-               return ret;
 
        return clk_prepare_enable(dd->gclk);
 }
        return 0;
 }
 
-#define CLASSD_ACLK_RATE_11M2896_MPY_8 (112896 * 100 * 8)
-#define CLASSD_ACLK_RATE_12M288_MPY_8  (12288 * 1000 * 8)
+#define CLASSD_GCLK_RATE_11M2896_MPY_8 (112896 * 100 * 8)
+#define CLASSD_GCLK_RATE_12M288_MPY_8  (12288 * 1000 * 8)
 
 static struct {
        int rate;
        int sample_rate;
        int dsp_clk;
-       unsigned long aclk_rate;
+       unsigned long gclk_rate;
 } const sample_rates[] = {
        { 8000,  CLASSD_INTPMR_FRAME_8K,
-       CLASSD_INTPMR_DSP_CLK_FREQ_12M288, CLASSD_ACLK_RATE_12M288_MPY_8 },
+       CLASSD_INTPMR_DSP_CLK_FREQ_12M288, CLASSD_GCLK_RATE_12M288_MPY_8 },
        { 16000, CLASSD_INTPMR_FRAME_16K,
-       CLASSD_INTPMR_DSP_CLK_FREQ_12M288, CLASSD_ACLK_RATE_12M288_MPY_8 },
+       CLASSD_INTPMR_DSP_CLK_FREQ_12M288, CLASSD_GCLK_RATE_12M288_MPY_8 },
        { 32000, CLASSD_INTPMR_FRAME_32K,
-       CLASSD_INTPMR_DSP_CLK_FREQ_12M288, CLASSD_ACLK_RATE_12M288_MPY_8 },
+       CLASSD_INTPMR_DSP_CLK_FREQ_12M288, CLASSD_GCLK_RATE_12M288_MPY_8 },
        { 48000, CLASSD_INTPMR_FRAME_48K,
-       CLASSD_INTPMR_DSP_CLK_FREQ_12M288, CLASSD_ACLK_RATE_12M288_MPY_8 },
+       CLASSD_INTPMR_DSP_CLK_FREQ_12M288, CLASSD_GCLK_RATE_12M288_MPY_8 },
        { 96000, CLASSD_INTPMR_FRAME_96K,
-       CLASSD_INTPMR_DSP_CLK_FREQ_12M288, CLASSD_ACLK_RATE_12M288_MPY_8 },
+       CLASSD_INTPMR_DSP_CLK_FREQ_12M288, CLASSD_GCLK_RATE_12M288_MPY_8 },
        { 22050, CLASSD_INTPMR_FRAME_22K,
-       CLASSD_INTPMR_DSP_CLK_FREQ_11M2896, CLASSD_ACLK_RATE_11M2896_MPY_8 },
+       CLASSD_INTPMR_DSP_CLK_FREQ_11M2896, CLASSD_GCLK_RATE_11M2896_MPY_8 },
        { 44100, CLASSD_INTPMR_FRAME_44K,
-       CLASSD_INTPMR_DSP_CLK_FREQ_11M2896, CLASSD_ACLK_RATE_11M2896_MPY_8 },
+       CLASSD_INTPMR_DSP_CLK_FREQ_11M2896, CLASSD_GCLK_RATE_11M2896_MPY_8 },
        { 88200, CLASSD_INTPMR_FRAME_88K,
-       CLASSD_INTPMR_DSP_CLK_FREQ_11M2896, CLASSD_ACLK_RATE_11M2896_MPY_8 },
+       CLASSD_INTPMR_DSP_CLK_FREQ_11M2896, CLASSD_GCLK_RATE_11M2896_MPY_8 },
 };
 
 static int
        }
 
        dev_dbg(codec->dev,
-               "Selected SAMPLE_RATE of %dHz, ACLK_RATE of %ldHz\n",
-               sample_rates[best].rate, sample_rates[best].aclk_rate);
+               "Selected SAMPLE_RATE of %dHz, GCLK_RATE of %ldHz\n",
+               sample_rates[best].rate, sample_rates[best].gclk_rate);
 
        clk_disable_unprepare(dd->gclk);
-       clk_disable_unprepare(dd->aclk);
 
-       ret = clk_set_rate(dd->aclk, sample_rates[best].aclk_rate);
+       ret = clk_set_rate(dd->gclk, sample_rates[best].gclk_rate);
        if (ret)
                return ret;
 
 
        snd_soc_update_bits(codec, CLASSD_INTPMR, mask, val);
 
-       ret = clk_prepare_enable(dd->aclk);
-       if (ret)
-               return ret;
-
        return clk_prepare_enable(dd->gclk);
 }
 
        struct atmel_classd *dd = snd_soc_card_get_drvdata(rtd->card);
 
        clk_disable_unprepare(dd->gclk);
-       clk_disable_unprepare(dd->aclk);
 }
 
 static int atmel_classd_codec_dai_prepare(struct snd_pcm_substream *substream,
                return ret;
        }
 
-       dd->aclk = devm_clk_get(dev, "aclk");
-       if (IS_ERR(dd->aclk)) {
-               ret = PTR_ERR(dd->aclk);
-               dev_err(dev, "failed to get audio clock: %d\n", ret);
-               return ret;
-       }
-
        res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
        io_base = devm_ioremap_resource(dev, res);
        if (IS_ERR(io_base)) {