xhci: trace stream context at Set TR Deq command completion

A successful 'Set TR Deq' command writes a new dequeue pointer to the
stream context for stream rings, show the content of the stream ctx
at command completion.

Signed-off-by: Mathias Nyman <mathias.nyman@linux.intel.com>
Link: https://lore.kernel.org/r/20241106101459.775897-9-mathias.nyman@linux.intel.com
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>

diff --git a/drivers/usb/host/xhci-ring.c b/drivers/usb/host/xhci-ring.c
index f7f7b0a818f8736e927656e7e2781bef6f1635b8..f62b243d0fc4f9a901e79be0804ea041ec9c71bb 100644 (file)
--- a/drivers/usb/host/xhci-ring.c
+++ b/drivers/usb/host/xhci-ring.c
@@ -1338,6 +1338,7 @@ static void xhci_handle_cmd_set_deq(struct xhci_hcd *xhci, int slot_id,
        struct xhci_virt_ep *ep;
        struct xhci_ep_ctx *ep_ctx;
        struct xhci_slot_ctx *slot_ctx;
+       struct xhci_stream_ctx *stream_ctx;
        struct xhci_td *td, *tmp_td;
        bool deferred = false;
 
@@ -1360,6 +1361,11 @@ static void xhci_handle_cmd_set_deq(struct xhci_hcd *xhci, int slot_id,
        trace_xhci_handle_cmd_set_deq(slot_ctx);
        trace_xhci_handle_cmd_set_deq_ep(ep_ctx);
 
+       if (ep->ep_state & EP_HAS_STREAMS) {
+               stream_ctx = &ep->stream_info->stream_ctx_array[stream_id];
+               trace_xhci_handle_cmd_set_deq_stream(ep->stream_info, stream_id);
+       }
+
        if (cmd_comp_code != COMP_SUCCESS) {
                unsigned int ep_state;
                unsigned int slot_state;
@@ -1396,9 +1402,7 @@ static void xhci_handle_cmd_set_deq(struct xhci_hcd *xhci, int slot_id,
                u64 deq;
                /* 4.6.10 deq ptr is written to the stream ctx for streams */
                if (ep->ep_state & EP_HAS_STREAMS) {
-                       struct xhci_stream_ctx *ctx =
-                               &ep->stream_info->stream_ctx_array[stream_id];
-                       deq = le64_to_cpu(ctx->stream_ring) & SCTX_DEQ_MASK;
+                       deq = le64_to_cpu(stream_ctx->stream_ring) & SCTX_DEQ_MASK;
 
                        /*
                         * Cadence xHCI controllers store some endpoint state
@@ -1410,8 +1414,8 @@ static void xhci_handle_cmd_set_deq(struct xhci_hcd *xhci, int slot_id,
                         * To fix this issue driver must clear Rsvd0 field.
                         */
                        if (xhci->quirks & XHCI_CDNS_SCTX_QUIRK) {
-                               ctx->reserved[0] = 0;
-                               ctx->reserved[1] = 0;
+                               stream_ctx->reserved[0] = 0;
+                               stream_ctx->reserved[1] = 0;
                        }
                } else {
                        deq = le64_to_cpu(ep_ctx->deq) & ~EP_CTX_CYCLE_MASK;

diff --git a/drivers/usb/host/xhci-trace.h b/drivers/usb/host/xhci-trace.h
index 56af9f62916a7565bb5254b1dacaa4565732d705..bfb5c5c170127a364f9455456a86be53e8007df4 100644 (file)
--- a/drivers/usb/host/xhci-trace.h
+++ b/drivers/usb/host/xhci-trace.h
@@ -340,6 +340,11 @@ DEFINE_EVENT(xhci_log_stream_ctx, xhci_alloc_stream_info_ctx,
        TP_ARGS(info, stream_id)
 );
 
+DEFINE_EVENT(xhci_log_stream_ctx, xhci_handle_cmd_set_deq_stream,
+       TP_PROTO(struct xhci_stream_info *info, unsigned int stream_id),
+       TP_ARGS(info, stream_id)
+);
+
 DECLARE_EVENT_CLASS(xhci_log_ep_ctx,
        TP_PROTO(struct xhci_ep_ctx *ctx),
        TP_ARGS(ctx),