u32 val;
 
        if (phy_interface_mode_is_rgmii(port->phy_interface) ||
-           port->phy_interface == PHY_INTERFACE_MODE_SGMII ||
-           port->phy_interface == PHY_INTERFACE_MODE_1000BASEX ||
-           port->phy_interface == PHY_INTERFACE_MODE_2500BASEX) {
+           phy_interface_mode_is_8023z(port->phy_interface) ||
+           port->phy_interface == PHY_INTERFACE_MODE_SGMII) {
                /* Enable the GMAC link status irq for this port */
                val = readl(port->base + MVPP22_GMAC_INT_SUM_MASK);
                val |= MVPP22_GMAC_INT_SUM_MASK_LINK_STAT;
        }
 
        if (phy_interface_mode_is_rgmii(port->phy_interface) ||
-           port->phy_interface == PHY_INTERFACE_MODE_SGMII ||
-           port->phy_interface == PHY_INTERFACE_MODE_1000BASEX ||
-           port->phy_interface == PHY_INTERFACE_MODE_2500BASEX) {
+           phy_interface_mode_is_8023z(port->phy_interface) ||
+           port->phy_interface == PHY_INTERFACE_MODE_SGMII) {
                val = readl(port->base + MVPP22_GMAC_INT_SUM_MASK);
                val &= ~MVPP22_GMAC_INT_SUM_MASK_LINK_STAT;
                writel(val, port->base + MVPP22_GMAC_INT_SUM_MASK);
        u32 val;
 
        if (phy_interface_mode_is_rgmii(port->phy_interface) ||
-           port->phy_interface == PHY_INTERFACE_MODE_SGMII ||
-           port->phy_interface == PHY_INTERFACE_MODE_1000BASEX ||
-           port->phy_interface == PHY_INTERFACE_MODE_2500BASEX) {
+           phy_interface_mode_is_8023z(port->phy_interface) ||
+           port->phy_interface == PHY_INTERFACE_MODE_SGMII) {
                val = readl(port->base + MVPP22_GMAC_INT_MASK);
                val |= MVPP22_GMAC_INT_MASK_LINK_STAT;
                writel(val, port->base + MVPP22_GMAC_INT_MASK);
        else
                val &= ~MVPP2_GMAC_GMII_LB_EN_MASK;
 
-       if (port->phy_interface == PHY_INTERFACE_MODE_SGMII ||
-           port->phy_interface == PHY_INTERFACE_MODE_1000BASEX ||
-           port->phy_interface == PHY_INTERFACE_MODE_2500BASEX)
+       if (phy_interface_mode_is_8023z(port->phy_interface) ||
+           port->phy_interface == PHY_INTERFACE_MODE_SGMII)
                val |= MVPP2_GMAC_PCS_LB_EN_MASK;
        else
                val &= ~MVPP2_GMAC_PCS_LB_EN_MASK;
                                link = true;
                }
        } else if (phy_interface_mode_is_rgmii(port->phy_interface) ||
-                  port->phy_interface == PHY_INTERFACE_MODE_SGMII ||
-                  port->phy_interface == PHY_INTERFACE_MODE_1000BASEX ||
-                  port->phy_interface == PHY_INTERFACE_MODE_2500BASEX) {
+                  phy_interface_mode_is_8023z(port->phy_interface) ||
+                  port->phy_interface == PHY_INTERFACE_MODE_SGMII) {
                val = readl(port->base + MVPP22_GMAC_INT_STAT);
                if (val & MVPP22_GMAC_INT_STAT_LINK) {
                        event = true;
        ctrl0 &= ~MVPP2_GMAC_PORT_TYPE_MASK;
        ctrl2 &= ~(MVPP2_GMAC_PORT_RESET_MASK | MVPP2_GMAC_PCS_ENABLE_MASK);
 
-       if (state->interface == PHY_INTERFACE_MODE_1000BASEX ||
-           state->interface == PHY_INTERFACE_MODE_2500BASEX) {
+       if (phy_interface_mode_is_8023z(state->interface)) {
                /* 1000BaseX and 2500BaseX ports cannot negotiate speed nor can
                 * they negotiate duplex: they are always operating with a fixed
                 * speed of 1000/2500Mbps in full duplex, so force 1000/2500
        if (phylink_test(state->advertising, Asym_Pause))
                an |= MVPP2_GMAC_FC_ADV_ASM_EN;
 
-       if (state->interface == PHY_INTERFACE_MODE_SGMII ||
-           state->interface == PHY_INTERFACE_MODE_1000BASEX ||
-           state->interface == PHY_INTERFACE_MODE_2500BASEX) {
+       if (phy_interface_mode_is_8023z(state->interface) ||
+           state->interface == PHY_INTERFACE_MODE_SGMII) {
                an |= MVPP2_GMAC_IN_BAND_AUTONEG;
                ctrl2 |= MVPP2_GMAC_INBAND_AN_MASK | MVPP2_GMAC_PCS_ENABLE_MASK;
 
        if (state->interface == PHY_INTERFACE_MODE_10GKR)
                mvpp2_xlg_config(port, mode, state);
        else if (phy_interface_mode_is_rgmii(state->interface) ||
-                state->interface == PHY_INTERFACE_MODE_SGMII ||
-                state->interface == PHY_INTERFACE_MODE_1000BASEX ||
-                state->interface == PHY_INTERFACE_MODE_2500BASEX)
+                phy_interface_mode_is_8023z(state->interface) ||
+                state->interface == PHY_INTERFACE_MODE_SGMII)
                mvpp2_gmac_config(port, mode, state);
 
        if (port->priv->hw_version == MVPP21 && port->flags & MVPP2_F_LOOPBACK)