drm/i915/tgl: Make sure TC-cold is blocked before enabling TC AUX power wells

The dependency between power wells is determined by the ordering of the
power well list: when enabling the power wells for a domain, this
happens walking the power well list forward, while disabling them
happens in the reverse direction. Accordingly a power well on the list
must follow any other power well it depends on.

Since the TC AUX power wells depend on TC-cold being blocked, move the
TC-cold off power well before all AUX power wells.

Fixes: 3c02934b24e3 ("drm/i915/tc/tgl: Implement TC cold sequences")
Cc: José Roberto de Souza <jose.souza@intel.com>
Signed-off-by: Imre Deak <imre.deak@intel.com>
Reviewed-by: José Roberto de Souza <jose.souza@intel.com>
Link: https://patchwork.freedesktop.org/patch/msgid/20200720232952.16228-1-imre.deak@intel.com
Signed-off-by: Rodrigo Vivi <rodrigo.vivi@intel.com>
(cherry picked from commit b302a2e68807604af2a5015816c1d117747989b6)
Signed-off-by: Jani Nikula <jani.nikula@intel.com>

diff --git a/drivers/gpu/drm/i915/display/intel_display_power.c b/drivers/gpu/drm/i915/display/intel_display_power.c
index 4929d890bd1cc88e5428e84d6b6d6b39c6cae043..e0fcb89c736b733c6e39951ac1ee4cd5a7b08373 100644 (file)
--- a/drivers/gpu/drm/i915/display/intel_display_power.c
+++ b/drivers/gpu/drm/i915/display/intel_display_power.c
@@ -4146,6 +4146,12 @@ static const struct i915_power_well_desc tgl_power_wells[] = {
                        .hsw.idx = TGL_PW_CTL_IDX_DDI_TC6,
                },
        },
+       {
+               .name = "TC cold off",
+               .domains = TGL_TC_COLD_OFF_POWER_DOMAINS,
+               .ops = &tgl_tc_cold_off_ops,
+               .id = DISP_PW_ID_NONE,
+       },
        {
                .name = "AUX A",
                .domains = TGL_AUX_A_IO_POWER_DOMAINS,
@@ -4332,12 +4338,6 @@ static const struct i915_power_well_desc tgl_power_wells[] = {
                        .hsw.irq_pipe_mask = BIT(PIPE_D),
                },
        },
-       {
-               .name = "TC cold off",
-               .domains = TGL_TC_COLD_OFF_POWER_DOMAINS,
-               .ops = &tgl_tc_cold_off_ops,
-               .id = DISP_PW_ID_NONE,
-       },
 };
 
 static const struct i915_power_well_desc rkl_power_wells[] = {