clk: loongson2: Allow specifying clock flags for gate clock

Some gate clocks need to be supplied with flags, e.g., it may be
required to specify CLK_IS_CRTICAL for CPU clocks.

Add a field to loongson2_clk_board_info for representing clock flags,
and specify it when registering gate clocks. A new helper macro,
CLK_GATE_FLAGS, is added to simplify definitions.

Signed-off-by: Yao Zi <ziyao@disroot.org>
Signed-off-by: Stephen Boyd <sboyd@kernel.org>

diff --git a/drivers/clk/clk-loongson2.c b/drivers/clk/clk-loongson2.c
index 27e632edd484e3f38a480088ffaaba58924bbc76..cc3fb13e770f04f1448f211b4a8da34c9fd975bc 100644 (file)
--- a/drivers/clk/clk-loongson2.c
+++ b/drivers/clk/clk-loongson2.c
@@ -50,6 +50,7 @@ struct loongson2_clk_board_info {
        const char *name;
        const char *parent_name;
        unsigned long fixed_rate;
+       unsigned long flags;
        u8 reg_offset;
        u8 div_shift;
        u8 div_width;
@@ -105,6 +106,18 @@ struct loongson2_clk_board_info {
                .bit_idx        = _bidx,                        \
        }
 
+#define CLK_GATE_FLAGS(_id, _name, _pname, _offset, _bidx,     \
+                      _flags)                                  \
+       {                                                       \
+               .id             = _id,                          \
+               .type           = CLK_TYPE_GATE,                \
+               .name           = _name,                        \
+               .parent_name    = _pname,                       \
+               .reg_offset     = _offset,                      \
+               .bit_idx        = _bidx,                        \
+               .flags          = _flags                        \
+       }
+
 #define CLK_FIXED(_id, _name, _pname, _rate)                   \
        {                                                       \
                .id             = _id,                          \
@@ -332,7 +345,8 @@ static int loongson2_clk_probe(struct platform_device *pdev)
                                                          &clp->clk_lock);
                        break;
                case CLK_TYPE_GATE:
-                       hw = devm_clk_hw_register_gate(dev, p->name, p->parent_name, 0,
+                       hw = devm_clk_hw_register_gate(dev, p->name, p->parent_name,
+                                                      p->flags,
                                                       clp->base + p->reg_offset,
                                                       p->bit_idx, 0,
                                                       &clp->clk_lock);