return;
 
        if (!xe_gt_is_media_type(gt)) {
-               xe_mmio_write32(gt, SCRATCH1LPFC, EN_L3_RW_CCS_CACHE_FLUSH);
+               xe_mmio_write32(>->mmio, SCRATCH1LPFC, EN_L3_RW_CCS_CACHE_FLUSH);
                reg = xe_gt_mcr_unicast_read_any(gt, XE2_GAMREQSTRM_CTRL);
                reg |= CG_DIS_CNTLBUS;
                xe_gt_mcr_multicast_write(gt, XE2_GAMREQSTRM_CTRL, reg);
                        else if (entry->clr_bits + 1)
                                val = (reg.mcr ?
                                       xe_gt_mcr_unicast_read_any(gt, reg_mcr) :
-                                      xe_mmio_read32(gt, reg)) & (~entry->clr_bits);
+                                      xe_mmio_read32(>->mmio, reg)) & (~entry->clr_bits);
                        else
                                val = 0;
 
         * Stash hardware-reported version.  Since this register does not exist
         * on pre-MTL platforms, reading it there will (correctly) return 0.
         */
-       gt->info.gmdid = xe_mmio_read32(gt, GMD_ID);
+       gt->info.gmdid = xe_mmio_read32(>->mmio, GMD_ID);
 
        err = xe_force_wake_put(gt_to_fw(gt), XE_FW_GT);
        XE_WARN_ON(err);
 
        xe_gsc_wa_14015076503(gt, true);
 
-       xe_mmio_write32(gt, GDRST, GRDOM_FULL);
-       err = xe_mmio_wait32(gt, GDRST, GRDOM_FULL, 0, 5000, NULL, false);
+       xe_mmio_write32(>->mmio, GDRST, GRDOM_FULL);
+       err = xe_mmio_wait32(>->mmio, GDRST, GRDOM_FULL, 0, 5000, NULL, false);
        if (err)
                xe_gt_err(gt, "failed to clear GRDOM_FULL (%pe)\n",
                          ERR_PTR(err));