* properly.
         */
        intel_power_domains_disable(xe);
-       if (has_display(xe))
+       intel_fbdev_set_suspend(&xe->drm, FBINFO_STATE_SUSPENDED, true);
+       if (has_display(xe)) {
                drm_kms_helper_poll_disable(&xe->drm);
+               intel_display_driver_disable_user_access(xe);
+       }
 
        if (!runtime)
                intel_display_driver_suspend(xe);
 
        intel_hpd_cancel_work(xe);
 
+       if (has_display(xe))
+               intel_display_driver_suspend_access(xe);
+
        intel_encoder_suspend_all(&xe->display);
 
        intel_opregion_suspend(display, s2idle ? PCI_D1 : PCI_D3cold);
 
-       intel_fbdev_set_suspend(&xe->drm, FBINFO_STATE_SUSPENDED, true);
-
        intel_dmc_suspend(xe);
 }
 
        intel_display_driver_init_hw(xe);
        intel_hpd_init(xe);
 
+       if (has_display(xe))
+               intel_display_driver_resume_access(xe);
+
        /* MST sideband requires HPD interrupts enabled */
        intel_dp_mst_resume(xe);
        if (!runtime)
                intel_display_driver_resume(xe);
 
-       intel_hpd_poll_disable(xe);
-       if (has_display(xe))
+       if (has_display(xe)) {
                drm_kms_helper_poll_enable(&xe->drm);
+               intel_display_driver_enable_user_access(xe);
+       }
+       intel_hpd_poll_disable(xe);
 
        intel_opregion_resume(display);