arm64: dts: mediatek: add missing cache properties

As all level 2 and level 3 caches are unified, add required
cache-unified properties to fix warnings like:

  mt7622-rfb1.dtb: l2-cache: 'cache-unified' is a required property

Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Link: https://lore.kernel.org/r/20230421223157.115367-1-krzysztof.kozlowski@linaro.org
Signed-off-by: Matthias Brugger <matthias.bgg@gmail.com>

diff --git a/arch/arm64/boot/dts/mediatek/mt7622.dtsi b/arch/arm64/boot/dts/mediatek/mt7622.dtsi
index 006cd639059faf260194e54594b1624f8e245376..36ef2dbe8add484ea9d3ba0fbb294376d77a9215 100644 (file)
--- a/arch/arm64/boot/dts/mediatek/mt7622.dtsi
+++ b/arch/arm64/boot/dts/mediatek/mt7622.dtsi
@@ -101,6 +101,7 @@
                L2: l2-cache {
                        compatible = "cache";
                        cache-level = <2>;
+                       cache-unified;
                };
        };
 

diff --git a/arch/arm64/boot/dts/mediatek/mt8186.dtsi b/arch/arm64/boot/dts/mediatek/mt8186.dtsi
index 29dddd8c08f1aa70564b5f14cdf0780734cbd993..8c02232cac38f49fd0d79e1d935ef4d69d8092e2 100644 (file)
--- a/arch/arm64/boot/dts/mediatek/mt8186.dtsi
+++ b/arch/arm64/boot/dts/mediatek/mt8186.dtsi
@@ -258,6 +258,7 @@
                        cache-line-size = <64>;
                        cache-sets = <512>;
                        next-level-cache = <&l3_0>;
+                       cache-unified;
                };
 
                l2_1: l2-cache1 {
@@ -267,6 +268,7 @@
                        cache-line-size = <64>;
                        cache-sets = <512>;
                        next-level-cache = <&l3_0>;
+                       cache-unified;
                };
 
                l3_0: l3-cache {

diff --git a/arch/arm64/boot/dts/mediatek/mt8192.dtsi b/arch/arm64/boot/dts/mediatek/mt8192.dtsi
index 5c30caf74026565e85bdef3882dadb67330ae9c4..faaff39155dca623fd329d68ea29540d016fc2ff 100644 (file)
--- a/arch/arm64/boot/dts/mediatek/mt8192.dtsi
+++ b/arch/arm64/boot/dts/mediatek/mt8192.dtsi
@@ -228,6 +228,7 @@
                        cache-line-size = <64>;
                        cache-sets = <512>;
                        next-level-cache = <&l3_0>;
+                       cache-unified;
                };
 
                l2_1: l2-cache1 {
@@ -237,6 +238,7 @@
                        cache-line-size = <64>;
                        cache-sets = <512>;
                        next-level-cache = <&l3_0>;
+                       cache-unified;
                };
 
                l3_0: l3-cache {

diff --git a/arch/arm64/boot/dts/mediatek/mt8195.dtsi b/arch/arm64/boot/dts/mediatek/mt8195.dtsi
index 2cef831d952b400eee670ef1d9406af22afb252e..b53e959911999c4ab8032b2970b83f07b79d0f98 100644 (file)
--- a/arch/arm64/boot/dts/mediatek/mt8195.dtsi
+++ b/arch/arm64/boot/dts/mediatek/mt8195.dtsi
@@ -285,6 +285,7 @@
                        cache-line-size = <64>;
                        cache-sets = <512>;
                        next-level-cache = <&l3_0>;
+                       cache-unified;
                };
 
                l2_1: l2-cache1 {
@@ -294,6 +295,7 @@
                        cache-line-size = <64>;
                        cache-sets = <512>;
                        next-level-cache = <&l3_0>;
+                       cache-unified;
                };
 
                l3_0: l3-cache {