static int i915_frequency_info(struct seq_file *m, void *unused)
 {
        struct drm_i915_private *dev_priv = node_to_i915(m->private);
-       struct drm_device *dev = &dev_priv->drm;
        int ret = 0;
 
        intel_runtime_pm_get(dev_priv);
                }
 
                /* RPSTAT1 is in the GT power well */
-               ret = mutex_lock_interruptible(&dev->struct_mutex);
-               if (ret)
-                       goto out;
-
                intel_uncore_forcewake_get(dev_priv, FORCEWAKE_ALL);
 
                reqf = I915_READ(GEN6_RPNSWREQ);
                cagf = intel_gpu_freq(dev_priv, cagf);
 
                intel_uncore_forcewake_put(dev_priv, FORCEWAKE_ALL);
-               mutex_unlock(&dev->struct_mutex);
 
                if (IS_GEN6(dev_priv) || IS_GEN7(dev_priv)) {
                        pm_ier = I915_READ(GEN6_PMIER);
        seq_printf(m, "Max CD clock frequency: %d kHz\n", dev_priv->max_cdclk_freq);
        seq_printf(m, "Max pixel clock frequency: %d kHz\n", dev_priv->max_dotclk_freq);
 
-out:
        intel_runtime_pm_put(dev_priv);
        return ret;
 }