add support that allow the userspace tool like RGP to get the GFX clock
value at runtime, the fix follow the old way to show the min/current/max
clocks level for compatible consideration.
=== Test ===
$ cat /sys/class/drm/card0/device/pp_dpm_sclk
0: 200Mhz *
1: 1100Mhz
2: 1600Mhz
then run stress test on one APU system.
$ cat /sys/class/drm/card0/device/pp_dpm_sclk
0: 200Mhz
1: 1040Mhz *
2: 1600Mhz
The current GFXCLK value is updated at runtime.
BugLink: https://gitlab.freedesktop.org/mesa/mesa/-/issues/5260
Reviewed-by: Huang Ray <Ray.Huang@amd.com>
Signed-off-by: Perry Yuan <Perry.Yuan@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
 
 {
        int ret = 0, size = 0;
        uint32_t cur_value = 0;
+       int i;
 
        smu_cmn_get_sysfs_buf(&buf, &size);
 
                size += sysfs_emit_at(buf, size, "VDDC: %7umV  %10umV\n",
                                                CYAN_SKILLFISH_VDDC_MIN, CYAN_SKILLFISH_VDDC_MAX);
                break;
-       case SMU_GFXCLK:
-       case SMU_SCLK:
        case SMU_FCLK:
        case SMU_MCLK:
        case SMU_SOCCLK:
                        return ret;
                size += sysfs_emit_at(buf, size, "0: %uMhz *\n", cur_value);
                break;
+       case SMU_SCLK:
+       case SMU_GFXCLK:
+               ret = cyan_skillfish_get_current_clk_freq(smu, clk_type, &cur_value);
+               if (ret)
+                       return ret;
+               if (cur_value  == CYAN_SKILLFISH_SCLK_MAX)
+                       i = 2;
+               else if (cur_value == CYAN_SKILLFISH_SCLK_MIN)
+                       i = 0;
+               else
+                       i = 1;
+               size += sysfs_emit_at(buf, size, "0: %uMhz %s\n", CYAN_SKILLFISH_SCLK_MIN,
+                               i == 0 ? "*" : "");
+               size += sysfs_emit_at(buf, size, "1: %uMhz %s\n",
+                               i == 1 ? cur_value : cyan_skillfish_sclk_default,
+                               i == 1 ? "*" : "");
+               size += sysfs_emit_at(buf, size, "2: %uMhz %s\n", CYAN_SKILLFISH_SCLK_MAX,
+                               i == 2 ? "*" : "");
+               break;
        default:
                dev_warn(smu->adev->dev, "Unsupported clock type\n");
                return ret;
 
        int i, size = 0, ret = 0;
        uint32_t cur_value = 0, value = 0, count = 0;
        bool cur_value_match_level = false;
+       uint32_t min, max;
 
        memset(&metrics, 0, sizeof(metrics));
 
                if (ret)
                        return ret;
                break;
+       case SMU_GFXCLK:
+       case SMU_SCLK:
+               ret = smu_cmn_send_smc_msg_with_param(smu, SMU_MSG_GetGfxclkFrequency, 0, &cur_value);
+               if (ret) {
+                       return ret;
+               }
+               break;
        default:
                break;
        }
                if (!cur_value_match_level)
                        size += sysfs_emit_at(buf, size, "   %uMhz *\n", cur_value);
                break;
+       case SMU_GFXCLK:
+       case SMU_SCLK:
+               min = (smu->gfx_actual_hard_min_freq > 0) ? smu->gfx_actual_hard_min_freq : smu->gfx_default_hard_min_freq;
+               max = (smu->gfx_actual_soft_max_freq > 0) ? smu->gfx_actual_soft_max_freq : smu->gfx_default_soft_max_freq;
+               if (cur_value  == max)
+                       i = 2;
+               else if (cur_value == min)
+                       i = 0;
+               else
+                       i = 1;
+               size += sysfs_emit_at(buf, size, "0: %uMhz %s\n", min,
+                               i == 0 ? "*" : "");
+               size += sysfs_emit_at(buf, size, "1: %uMhz %s\n",
+                               i == 1 ? cur_value : VANGOGH_UMD_PSTATE_STANDARD_GFXCLK,
+                               i == 1 ? "*" : "");
+               size += sysfs_emit_at(buf, size, "2: %uMhz %s\n", max,
+                               i == 2 ? "*" : "");
+               break;
        default:
                break;
        }
 
        case SMU_FCLK:
                return smu_cmn_send_smc_msg_with_param(smu,
                                SMU_MSG_GetFclkFrequency, 0, value);
+       case SMU_GFXCLK:
+       case SMU_SCLK:
+               return smu_cmn_send_smc_msg_with_param(smu,
+                               SMU_MSG_GetGfxclkFrequency, 0, value);
+               break;
        default:
                return -EINVAL;
        }
 {
        int i, size = 0, ret = 0;
        uint32_t cur_value = 0, value = 0, count = 0;
+       uint32_t min, max;
 
        smu_cmn_get_sysfs_buf(&buf, &size);
 
                                        cur_value == value ? "*" : "");
                }
                break;
+       case SMU_GFXCLK:
+       case SMU_SCLK:
+               ret = yellow_carp_get_current_clk_freq(smu, clk_type, &cur_value);
+               if (ret)
+                       goto print_clk_out;
+               min = (smu->gfx_actual_hard_min_freq > 0) ? smu->gfx_actual_hard_min_freq : smu->gfx_default_hard_min_freq;
+               max = (smu->gfx_actual_soft_max_freq > 0) ? smu->gfx_actual_soft_max_freq : smu->gfx_default_soft_max_freq;
+               if (cur_value  == max)
+                       i = 2;
+               else if (cur_value == min)
+                       i = 0;
+               else
+                       i = 1;
+               size += sysfs_emit_at(buf, size, "0: %uMhz %s\n", min,
+                               i == 0 ? "*" : "");
+               size += sysfs_emit_at(buf, size, "1: %uMhz %s\n",
+                               i == 1 ? cur_value : YELLOW_CARP_UMD_PSTATE_GFXCLK,
+                               i == 1 ? "*" : "");
+               size += sysfs_emit_at(buf, size, "2: %uMhz %s\n", max,
+                               i == 2 ? "*" : "");
+               break;
        default:
                break;
        }
 
 #define __YELLOW_CARP_PPT_H__
 
 extern void yellow_carp_set_ppt_funcs(struct smu_context *smu);
+#define YELLOW_CARP_UMD_PSTATE_GFXCLK       1100
 
 #endif