platform/x86: mlx-platform: Fix tachometer registers

[ Upstream commit edd45cba5ed7f53974475ddc9a1453c2c87b3328 ]

Shift by one the registers for tachometers (7 - 12).

This fix is relevant for the same new systems MQMB7, MSN37, MSN34,
which are about to be released to the customers.
At the moment, none of them is at customers sites. The customers will
not suffer from this change.
This fix is necessary, because register used before for tachometer 7
has been than reserved for the second PWM for newer systems, which are
not supported yet in mlx-platform driver. So registers of tachometers
7-12 have been shifted by one.

Fixes: 0378123c5800 ("platform/x86: mlx-platform: Add mlxreg-fan platform driver activation")
Signed-off-by: Vadim Pasternak <vadimp@mellanox.com>
Signed-off-by: Darren Hart (VMware) <dvhart@infradead.org>
Signed-off-by: Sasha Levin <sashal@kernel.org>

diff --git a/drivers/platform/x86/mlx-platform.c b/drivers/platform/x86/mlx-platform.c
index c2c3a1a19879596bd905952a9e028e96ea7cba01..14f88bfabd5d42153d520dcf73bd70652ae1d8f6 100644 (file)
--- a/drivers/platform/x86/mlx-platform.c
+++ b/drivers/platform/x86/mlx-platform.c
@@ -83,12 +83,12 @@
 #define MLXPLAT_CPLD_LPC_REG_TACHO4_OFFSET     0xe7
 #define MLXPLAT_CPLD_LPC_REG_TACHO5_OFFSET     0xe8
 #define MLXPLAT_CPLD_LPC_REG_TACHO6_OFFSET     0xe9
-#define MLXPLAT_CPLD_LPC_REG_TACHO7_OFFSET     0xea
-#define MLXPLAT_CPLD_LPC_REG_TACHO8_OFFSET     0xeb
-#define MLXPLAT_CPLD_LPC_REG_TACHO9_OFFSET     0xec
-#define MLXPLAT_CPLD_LPC_REG_TACHO10_OFFSET    0xed
-#define MLXPLAT_CPLD_LPC_REG_TACHO11_OFFSET    0xee
-#define MLXPLAT_CPLD_LPC_REG_TACHO12_OFFSET    0xef
+#define MLXPLAT_CPLD_LPC_REG_TACHO7_OFFSET     0xeb
+#define MLXPLAT_CPLD_LPC_REG_TACHO8_OFFSET     0xec
+#define MLXPLAT_CPLD_LPC_REG_TACHO9_OFFSET     0xed
+#define MLXPLAT_CPLD_LPC_REG_TACHO10_OFFSET    0xee
+#define MLXPLAT_CPLD_LPC_REG_TACHO11_OFFSET    0xef
+#define MLXPLAT_CPLD_LPC_REG_TACHO12_OFFSET    0xf0
 #define MLXPLAT_CPLD_LPC_IO_RANGE              0x100
 #define MLXPLAT_CPLD_LPC_I2C_CH1_OFF           0xdb
 #define MLXPLAT_CPLD_LPC_I2C_CH2_OFF           0xda