]> www.infradead.org Git - users/willy/xarray.git/commitdiff
arm64: dts: st: Add combophy node on stm32mp251
authorChristian Bruel <christian.bruel@foss.st.com>
Mon, 30 Sep 2024 17:08:46 +0000 (19:08 +0200)
committerAlexandre Torgue <alexandre.torgue@foss.st.com>
Mon, 9 Dec 2024 16:19:55 +0000 (17:19 +0100)
Add support for COMBOPHY which is used either by the USB3 and PCIe
controller.
USB3 or PCIe mode is done with phy_set_mode().
PCIe internal reference clock can be generated from the internal clock
source or optionnaly from an external 100Mhz pad.

Signed-off-by: Christian Bruel <christian.bruel@foss.st.com>
Signed-off-by: Alexandre Torgue <alexandre.torgue@foss.st.com>
arch/arm64/boot/dts/st/stm32mp251.dtsi

index 1accf931c49ec30e21c08ef943148a08d6c5a857..e53b6c1d03b6b4ec5ec3d7f7b59647b55f4889e6 100644 (file)
@@ -7,6 +7,7 @@
 #include <dt-bindings/interrupt-controller/arm-gic.h>
 #include <dt-bindings/reset/st,stm32mp25-rcc.h>
 #include <dt-bindings/regulator/st,stm32mp25-regulator.h>
+#include <dt-bindings/phy/phy.h>
 
 / {
        #address-cells = <2>;
                                status = "disabled";
                        };
 
+                       combophy: phy@480c0000 {
+                               compatible = "st,stm32mp25-combophy";
+                               reg = <0x480c0000 0x1000>;
+                               #phy-cells = <1>;
+                               clocks = <&rcc CK_BUS_USB3PCIEPHY>, <&rcc CK_KER_USB3PCIEPHY>;
+                               clock-names = "apb", "ker";
+                               resets = <&rcc USB3PCIEPHY_R>;
+                               reset-names = "phy";
+                               access-controllers = <&rifsc 67>;
+                               power-domains = <&CLUSTER_PD>;
+                               wakeup-source;
+                               interrupts-extended = <&exti1 45 IRQ_TYPE_EDGE_FALLING>;
+                               status = "disabled";
+                       };
+
                        sdmmc1: mmc@48220000 {
                                compatible = "st,stm32mp25-sdmmc2", "arm,pl18x", "arm,primecell";
                                arm,primecell-periphid = <0x00353180>;