}
 
 #define INTEL_INFO(dev_priv)   intel_info((dev_priv))
+#define DRIVER_CAPS(dev_priv)  (&(dev_priv)->caps)
 
 #define INTEL_GEN(dev_priv)    ((dev_priv)->info.gen)
 #define INTEL_DEVID(dev_priv)  ((dev_priv)->info.device_id)
 
        }
 
        DRM_DEBUG_DRIVER("%s context support initialized\n",
-                        dev_priv->engine[RCS]->context_size ? "logical" :
-                        "fake");
+                        DRIVER_CAPS(dev_priv)->has_logical_contexts ?
+                        "logical" : "fake");
        return 0;
 }
 
        struct i915_gem_context *ctx;
        int ret;
 
-       if (!dev_priv->engine[RCS]->context_size)
+       if (!DRIVER_CAPS(dev_priv)->has_logical_contexts)
                return -ENODEV;
 
        if (args->pad != 0)
 
 void intel_driver_caps_print(const struct intel_driver_caps *caps,
                             struct drm_printer *p)
 {
+       drm_printf(p, "Has logical contexts? %s\n",
+                  yesno(caps->has_logical_contexts));
        drm_printf(p, "scheduler: %x\n", caps->scheduler);
 }
 
 
 
 struct intel_driver_caps {
        unsigned int scheduler;
+       bool has_logical_contexts:1;
 };
 
 static inline unsigned int sseu_subslice_total(const struct sseu_dev_info *sseu)
 
                                                           engine->class);
        if (WARN_ON(engine->context_size > BIT(20)))
                engine->context_size = 0;
+       if (engine->context_size)
+               DRIVER_CAPS(dev_priv)->has_logical_contexts = true;
 
        /* Nothing to do here, execute in order of dependencies */
        engine->schedule = NULL;