]> www.infradead.org Git - users/dwmw2/linux.git/commitdiff
drm/nouveau/nvenc/tu102-: prepare for GSP-RM
authorBen Skeggs <bskeggs@redhat.com>
Mon, 18 Sep 2023 20:21:33 +0000 (06:21 +1000)
committerDave Airlie <airlied@redhat.com>
Tue, 31 Oct 2023 05:08:14 +0000 (15:08 +1000)
- (temporarily) disable if GSP-RM detected, will be added later
- provide empty class list for non-GSP paths
- split tu102 from gm107, it will provide host classes later

Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
Signed-off-by: Dave Airlie <airlied@redhat.com>
Link: https://patchwork.freedesktop.org/patch/msgid/20230918202149.4343-29-skeggsb@gmail.com
drivers/gpu/drm/nouveau/include/nvkm/engine/nvenc.h
drivers/gpu/drm/nouveau/nvkm/engine/device/base.c
drivers/gpu/drm/nouveau/nvkm/engine/nvenc/Kbuild
drivers/gpu/drm/nouveau/nvkm/engine/nvenc/base.c
drivers/gpu/drm/nouveau/nvkm/engine/nvenc/gm107.c
drivers/gpu/drm/nouveau/nvkm/engine/nvenc/priv.h
drivers/gpu/drm/nouveau/nvkm/engine/nvenc/tu102.c [new file with mode: 0644]

index 1a259c5c9a7140e12be1e5c130cc255fe9ea074e..1f6eef13f872cf395f8320331c7ef22feffc8a8d 100644 (file)
@@ -12,4 +12,5 @@ struct nvkm_nvenc {
 };
 
 int gm107_nvenc_new(struct nvkm_device *, enum nvkm_subdev_type, int inst, struct nvkm_nvenc **);
+int tu102_nvenc_new(struct nvkm_device *, enum nvkm_subdev_type, int inst, struct nvkm_nvenc **);
 #endif
index c0f1a8110452e8767ebf3b07a050494274c5185e..80ebf2a3a990d73d0bd87a6d779e733431444dbe 100644 (file)
@@ -2427,7 +2427,7 @@ nv162_chipset = {
        .fifo     = { 0x00000001, tu102_fifo_new },
        .gr       = { 0x00000001, tu102_gr_new },
        .nvdec    = { 0x00000001, tu102_nvdec_new },
-       .nvenc    = { 0x00000001, gm107_nvenc_new },
+       .nvenc    = { 0x00000001, tu102_nvenc_new },
        .sec2     = { 0x00000001, tu102_sec2_new },
 };
 
@@ -2462,7 +2462,7 @@ nv164_chipset = {
        .fifo     = { 0x00000001, tu102_fifo_new },
        .gr       = { 0x00000001, tu102_gr_new },
        .nvdec    = { 0x00000003, tu102_nvdec_new },
-       .nvenc    = { 0x00000001, gm107_nvenc_new },
+       .nvenc    = { 0x00000001, tu102_nvenc_new },
        .sec2     = { 0x00000001, tu102_sec2_new },
 };
 
@@ -2497,7 +2497,7 @@ nv166_chipset = {
        .fifo     = { 0x00000001, tu102_fifo_new },
        .gr       = { 0x00000001, tu102_gr_new },
        .nvdec    = { 0x00000007, tu102_nvdec_new },
-       .nvenc    = { 0x00000001, gm107_nvenc_new },
+       .nvenc    = { 0x00000001, tu102_nvenc_new },
        .sec2     = { 0x00000001, tu102_sec2_new },
 };
 
@@ -2532,7 +2532,7 @@ nv167_chipset = {
        .fifo     = { 0x00000001, tu102_fifo_new },
        .gr       = { 0x00000001, tu102_gr_new },
        .nvdec    = { 0x00000001, tu102_nvdec_new },
-       .nvenc    = { 0x00000001, gm107_nvenc_new },
+       .nvenc    = { 0x00000001, tu102_nvenc_new },
        .sec2     = { 0x00000001, tu102_sec2_new },
 };
 
@@ -2567,7 +2567,7 @@ nv168_chipset = {
        .fifo     = { 0x00000001, tu102_fifo_new },
        .gr       = { 0x00000001, tu102_gr_new },
        .nvdec    = { 0x00000001, tu102_nvdec_new },
-       .nvenc    = { 0x00000001, gm107_nvenc_new },
+       .nvenc    = { 0x00000001, tu102_nvenc_new },
        .sec2     = { 0x00000001, tu102_sec2_new },
 };
 
index 75bf4436bf3fe1fc039c43e0064dc82262ac2bc0..6dcb20d1d156f1c0edd730afd1300c1cc9b31588 100644 (file)
@@ -1,3 +1,4 @@
 # SPDX-License-Identifier: MIT
 nvkm-y += nvkm/engine/nvenc/base.o
 nvkm-y += nvkm/engine/nvenc/gm107.o
+nvkm-y += nvkm/engine/nvenc/tu102.o
index cf5dcfda7b2538fbcbaafe0095292bf272ab8d95..d45dbb42a0dbf02446d2ad4a0ab27791bed5cedd 100644 (file)
@@ -34,6 +34,7 @@ nvkm_nvenc_dtor(struct nvkm_engine *engine)
 static const struct nvkm_engine_func
 nvkm_nvenc = {
        .dtor = nvkm_nvenc_dtor,
+       .sclass = { {} },
 };
 
 int
@@ -59,4 +60,4 @@ nvkm_nvenc_new_(const struct nvkm_nvenc_fwif *fwif, struct nvkm_device *device,
 
        return nvkm_falcon_ctor(nvenc->func->flcn, &nvenc->engine.subdev,
                                nvenc->engine.subdev.name, 0, &nvenc->falcon);
-};
+}
index ad27d8b97569686186ebadca0073b5841d6a61be..922abb647ad3504f9283ca7cbfdf582da909c31d 100644 (file)
@@ -38,7 +38,7 @@ gm107_nvenc_nofw(struct nvkm_nvenc *nvenc, int ver,
        return 0;
 }
 
-static const struct nvkm_nvenc_fwif
+const struct nvkm_nvenc_fwif
 gm107_nvenc_fwif[] = {
        { -1, gm107_nvenc_nofw, &gm107_nvenc },
        {}
index 4130a2bfbb4f79b060eae00eb552f26a26a058d9..b097e3f2867b338c9d83c5c65643fddb9befcdb8 100644 (file)
@@ -14,6 +14,8 @@ struct nvkm_nvenc_fwif {
        const struct nvkm_nvenc_func *func;
 };
 
+extern const struct nvkm_nvenc_fwif gm107_nvenc_fwif[];
+
 int nvkm_nvenc_new_(const struct nvkm_nvenc_fwif *, struct nvkm_device *, enum nvkm_subdev_type,
                    int, struct nvkm_nvenc **pnvenc);
 #endif
diff --git a/drivers/gpu/drm/nouveau/nvkm/engine/nvenc/tu102.c b/drivers/gpu/drm/nouveau/nvkm/engine/nvenc/tu102.c
new file mode 100644 (file)
index 0000000..8a436b3
--- /dev/null
@@ -0,0 +1,34 @@
+/*
+ * Copyright 2023 Red Hat Inc.
+ *
+ * Permission is hereby granted, free of charge, to any person obtaining a
+ * copy of this software and associated documentation files (the "Software"),
+ * to deal in the Software without restriction, including without limitation
+ * the rights to use, copy, modify, merge, publish, distribute, sublicense,
+ * and/or sell copies of the Software, and to permit persons to whom the
+ * Software is furnished to do so, subject to the following conditions:
+ *
+ * The above copyright notice and this permission notice shall be included in
+ * all copies or substantial portions of the Software.
+ *
+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
+ * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
+ * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.  IN NO EVENT SHALL
+ * THE COPYRIGHT HOLDER(S) OR AUTHOR(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR
+ * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
+ * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
+ * OTHER DEALINGS IN THE SOFTWARE.
+ */
+#include "priv.h"
+
+#include <subdev/gsp.h>
+
+int
+tu102_nvenc_new(struct nvkm_device *device, enum nvkm_subdev_type type, int inst,
+               struct nvkm_nvenc **pnvenc)
+{
+       if (nvkm_gsp_rm(device->gsp))
+               return -ENODEV;
+
+       return nvkm_nvenc_new_(gm107_nvenc_fwif, device, type, inst, pnvenc);
+}