void ci_dpm_powergate_uvd(struct radeon_device *rdev, bool gate)
 {
+       struct ci_power_info *pi = ci_get_pi(rdev);
+
+       if (pi->uvd_power_gated == gate)
+               return;
+
+       pi->uvd_power_gated = gate;
+
        ci_update_uvd_dpm(rdev, gate);
 }
 
 
        ci_enable_auto_throttle_source(rdev, RADEON_DPM_AUTO_THROTTLE_SRC_THERMAL, true);
 
+       ci_dpm_powergate_uvd(rdev, true);
+
        cik_update_cg(rdev, (RADEON_CG_BLOCK_GFX |
                             RADEON_CG_BLOCK_MC |
                             RADEON_CG_BLOCK_SDMA |
                             RADEON_CG_BLOCK_UVD |
                             RADEON_CG_BLOCK_HDP), false);
 
+       ci_dpm_powergate_uvd(rdev, false);
+
        if (!ci_is_smc_running(rdev))
                return;
 
 
        pi->caps_dynamic_ac_timing = true;
 
+       pi->uvd_power_gated = false;
+
        return 0;
 }
 
 
        bool enable_pkg_pwr_tracking_feature;
        bool use_pcie_performance_levels;
        bool use_pcie_powersaving_levels;
+       bool uvd_power_gated;
        /* driver states */
        struct radeon_ps current_rps;
        struct ci_ps current_ps;