if (!status)
return IRQ_NONE;
- spin_lock(&chip->reg_lock);
-
- clear = status & (OXYGEN_CHANNEL_A |
- OXYGEN_CHANNEL_B |
- OXYGEN_CHANNEL_C |
- OXYGEN_CHANNEL_SPDIF |
- OXYGEN_CHANNEL_MULTICH |
- OXYGEN_CHANNEL_AC97 |
- OXYGEN_INT_SPDIF_IN_DETECT |
- OXYGEN_INT_GPIO |
- OXYGEN_INT_AC97);
- if (clear) {
- if (clear & OXYGEN_INT_SPDIF_IN_DETECT)
- chip->interrupt_mask &= ~OXYGEN_INT_SPDIF_IN_DETECT;
- oxygen_write16(chip, OXYGEN_INTERRUPT_MASK,
- chip->interrupt_mask & ~clear);
- oxygen_write16(chip, OXYGEN_INTERRUPT_MASK,
- chip->interrupt_mask);
- }
-
- elapsed_streams = status & chip->pcm_running;
+ scoped_guard(spinlock, &chip->reg_lock) {
+ clear = status & (OXYGEN_CHANNEL_A |
+ OXYGEN_CHANNEL_B |
+ OXYGEN_CHANNEL_C |
+ OXYGEN_CHANNEL_SPDIF |
+ OXYGEN_CHANNEL_MULTICH |
+ OXYGEN_CHANNEL_AC97 |
+ OXYGEN_INT_SPDIF_IN_DETECT |
+ OXYGEN_INT_GPIO |
+ OXYGEN_INT_AC97);
+ if (clear) {
+ if (clear & OXYGEN_INT_SPDIF_IN_DETECT)
+ chip->interrupt_mask &= ~OXYGEN_INT_SPDIF_IN_DETECT;
+ oxygen_write16(chip, OXYGEN_INTERRUPT_MASK,
+ chip->interrupt_mask & ~clear);
+ oxygen_write16(chip, OXYGEN_INTERRUPT_MASK,
+ chip->interrupt_mask);
+ }
- spin_unlock(&chip->reg_lock);
+ elapsed_streams = status & chip->pcm_running;
+ }
for (i = 0; i < PCM_COUNT; ++i)
if ((elapsed_streams & (1 << i)) && chip->streams[i])
snd_pcm_period_elapsed(chip->streams[i]);
if (status & OXYGEN_INT_SPDIF_IN_DETECT) {
- spin_lock(&chip->reg_lock);
+ guard(spinlock)(&chip->reg_lock);
i = oxygen_read32(chip, OXYGEN_SPDIF_CONTROL);
if (i & (OXYGEN_SPDIF_SENSE_INT | OXYGEN_SPDIF_LOCK_INT |
OXYGEN_SPDIF_RATE_INT)) {
oxygen_write32(chip, OXYGEN_SPDIF_CONTROL, i);
schedule_work(&chip->spdif_input_bits_work);
}
- spin_unlock(&chip->reg_lock);
}
if (status & OXYGEN_INT_GPIO)
* changes.
*/
msleep(1);
- spin_lock_irq(&chip->reg_lock);
- reg = oxygen_read32(chip, OXYGEN_SPDIF_CONTROL);
- if ((reg & (OXYGEN_SPDIF_SENSE_STATUS |
- OXYGEN_SPDIF_LOCK_STATUS))
- == OXYGEN_SPDIF_SENSE_STATUS) {
- /*
- * If we detect activity on the SPDIF input but cannot lock to
- * a signal, the clock bit is likely to be wrong.
- */
- reg ^= OXYGEN_SPDIF_IN_CLOCK_MASK;
- oxygen_write32(chip, OXYGEN_SPDIF_CONTROL, reg);
- spin_unlock_irq(&chip->reg_lock);
- msleep(1);
- spin_lock_irq(&chip->reg_lock);
+ scoped_guard(spinlock_irq, &chip->reg_lock) {
reg = oxygen_read32(chip, OXYGEN_SPDIF_CONTROL);
if ((reg & (OXYGEN_SPDIF_SENSE_STATUS |
OXYGEN_SPDIF_LOCK_STATUS))
== OXYGEN_SPDIF_SENSE_STATUS) {
- /* nothing detected with either clock; give up */
- if ((reg & OXYGEN_SPDIF_IN_CLOCK_MASK)
- == OXYGEN_SPDIF_IN_CLOCK_192) {
- /*
- * Reset clock to <= 96 kHz because this is
- * more likely to be received next time.
- */
- reg &= ~OXYGEN_SPDIF_IN_CLOCK_MASK;
- reg |= OXYGEN_SPDIF_IN_CLOCK_96;
- oxygen_write32(chip, OXYGEN_SPDIF_CONTROL, reg);
+ /*
+ * If we detect activity on the SPDIF input but cannot lock to
+ * a signal, the clock bit is likely to be wrong.
+ */
+ reg ^= OXYGEN_SPDIF_IN_CLOCK_MASK;
+ oxygen_write32(chip, OXYGEN_SPDIF_CONTROL, reg);
+ spin_unlock_irq(&chip->reg_lock);
+ msleep(1);
+ spin_lock_irq(&chip->reg_lock);
+ reg = oxygen_read32(chip, OXYGEN_SPDIF_CONTROL);
+ if ((reg & (OXYGEN_SPDIF_SENSE_STATUS |
+ OXYGEN_SPDIF_LOCK_STATUS))
+ == OXYGEN_SPDIF_SENSE_STATUS) {
+ /* nothing detected with either clock; give up */
+ if ((reg & OXYGEN_SPDIF_IN_CLOCK_MASK)
+ == OXYGEN_SPDIF_IN_CLOCK_192) {
+ /*
+ * Reset clock to <= 96 kHz because this is
+ * more likely to be received next time.
+ */
+ reg &= ~OXYGEN_SPDIF_IN_CLOCK_MASK;
+ reg |= OXYGEN_SPDIF_IN_CLOCK_96;
+ oxygen_write32(chip, OXYGEN_SPDIF_CONTROL, reg);
+ }
}
}
}
- spin_unlock_irq(&chip->reg_lock);
if (chip->controls[CONTROL_SPDIF_INPUT_BITS]) {
- spin_lock_irq(&chip->reg_lock);
- chip->interrupt_mask |= OXYGEN_INT_SPDIF_IN_DETECT;
- oxygen_write16(chip, OXYGEN_INTERRUPT_MASK,
- chip->interrupt_mask);
- spin_unlock_irq(&chip->reg_lock);
+ scoped_guard(spinlock_irq, &chip->reg_lock) {
+ chip->interrupt_mask |= OXYGEN_INT_SPDIF_IN_DETECT;
+ oxygen_write16(chip, OXYGEN_INTERRUPT_MASK,
+ chip->interrupt_mask);
+ }
/*
* We don't actually know that any channel status bits have
static void oxygen_shutdown(struct oxygen *chip)
{
- spin_lock_irq(&chip->reg_lock);
+ guard(spinlock_irq)(&chip->reg_lock);
chip->interrupt_mask = 0;
chip->pcm_running = 0;
oxygen_write16(chip, OXYGEN_DMA_STATUS, 0);
oxygen_write16(chip, OXYGEN_INTERRUPT_MASK, 0);
- spin_unlock_irq(&chip->reg_lock);
}
static void oxygen_card_free(struct snd_card *card)
oxygen_proc_init(chip);
- spin_lock_irq(&chip->reg_lock);
- if (chip->model.device_config & CAPTURE_1_FROM_SPDIF)
- chip->interrupt_mask |= OXYGEN_INT_SPDIF_IN_DETECT;
- if (chip->has_ac97_0 | chip->has_ac97_1)
- chip->interrupt_mask |= OXYGEN_INT_AC97;
- oxygen_write16(chip, OXYGEN_INTERRUPT_MASK, chip->interrupt_mask);
- spin_unlock_irq(&chip->reg_lock);
+ scoped_guard(spinlock_irq, &chip->reg_lock) {
+ if (chip->model.device_config & CAPTURE_1_FROM_SPDIF)
+ chip->interrupt_mask |= OXYGEN_INT_SPDIF_IN_DETECT;
+ if (chip->has_ac97_0 | chip->has_ac97_1)
+ chip->interrupt_mask |= OXYGEN_INT_AC97;
+ oxygen_write16(chip, OXYGEN_INTERRUPT_MASK, chip->interrupt_mask);
+ }
err = snd_card_register(card);
if (err < 0)
if (chip->model.suspend)
chip->model.suspend(chip);
- spin_lock_irq(&chip->reg_lock);
- saved_interrupt_mask = chip->interrupt_mask;
- chip->interrupt_mask = 0;
- oxygen_write16(chip, OXYGEN_DMA_STATUS, 0);
- oxygen_write16(chip, OXYGEN_INTERRUPT_MASK, 0);
- spin_unlock_irq(&chip->reg_lock);
+ scoped_guard(spinlock_irq, &chip->reg_lock) {
+ saved_interrupt_mask = chip->interrupt_mask;
+ chip->interrupt_mask = 0;
+ oxygen_write16(chip, OXYGEN_DMA_STATUS, 0);
+ oxygen_write16(chip, OXYGEN_INTERRUPT_MASK, 0);
+ }
flush_work(&chip->spdif_input_bits_work);
flush_work(&chip->gpio_work);
if (err < 0)
return err;
- spin_lock_irq(&chip->reg_lock);
- oxygen_write8_masked(chip, OXYGEN_REC_FORMAT,
- oxygen_format(hw_params) << OXYGEN_REC_FORMAT_A_SHIFT,
- OXYGEN_REC_FORMAT_A_MASK);
- oxygen_write16_masked(chip, OXYGEN_I2S_A_FORMAT,
- oxygen_rate(hw_params) |
- chip->model.adc_i2s_format |
- get_mclk(chip, PCM_A, hw_params) |
- oxygen_i2s_bits(hw_params),
- OXYGEN_I2S_RATE_MASK |
- OXYGEN_I2S_FORMAT_MASK |
- OXYGEN_I2S_MCLK_MASK |
- OXYGEN_I2S_BITS_MASK);
- spin_unlock_irq(&chip->reg_lock);
+ scoped_guard(spinlock_irq, &chip->reg_lock) {
+ oxygen_write8_masked(chip, OXYGEN_REC_FORMAT,
+ oxygen_format(hw_params) << OXYGEN_REC_FORMAT_A_SHIFT,
+ OXYGEN_REC_FORMAT_A_MASK);
+ oxygen_write16_masked(chip, OXYGEN_I2S_A_FORMAT,
+ oxygen_rate(hw_params) |
+ chip->model.adc_i2s_format |
+ get_mclk(chip, PCM_A, hw_params) |
+ oxygen_i2s_bits(hw_params),
+ OXYGEN_I2S_RATE_MASK |
+ OXYGEN_I2S_FORMAT_MASK |
+ OXYGEN_I2S_MCLK_MASK |
+ OXYGEN_I2S_BITS_MASK);
+ }
guard(mutex)(&chip->mutex);
chip->model.set_adc_params(chip, hw_params);
is_ac97 = chip->has_ac97_1 &&
(chip->model.device_config & CAPTURE_2_FROM_AC97_1);
- spin_lock_irq(&chip->reg_lock);
- oxygen_write8_masked(chip, OXYGEN_REC_FORMAT,
- oxygen_format(hw_params) << OXYGEN_REC_FORMAT_B_SHIFT,
- OXYGEN_REC_FORMAT_B_MASK);
- if (!is_ac97)
- oxygen_write16_masked(chip, OXYGEN_I2S_B_FORMAT,
- oxygen_rate(hw_params) |
- chip->model.adc_i2s_format |
- get_mclk(chip, PCM_B, hw_params) |
- oxygen_i2s_bits(hw_params),
- OXYGEN_I2S_RATE_MASK |
- OXYGEN_I2S_FORMAT_MASK |
- OXYGEN_I2S_MCLK_MASK |
- OXYGEN_I2S_BITS_MASK);
- spin_unlock_irq(&chip->reg_lock);
+ scoped_guard(spinlock_irq, &chip->reg_lock) {
+ oxygen_write8_masked(chip, OXYGEN_REC_FORMAT,
+ oxygen_format(hw_params) << OXYGEN_REC_FORMAT_B_SHIFT,
+ OXYGEN_REC_FORMAT_B_MASK);
+ if (!is_ac97)
+ oxygen_write16_masked(chip, OXYGEN_I2S_B_FORMAT,
+ oxygen_rate(hw_params) |
+ chip->model.adc_i2s_format |
+ get_mclk(chip, PCM_B, hw_params) |
+ oxygen_i2s_bits(hw_params),
+ OXYGEN_I2S_RATE_MASK |
+ OXYGEN_I2S_FORMAT_MASK |
+ OXYGEN_I2S_MCLK_MASK |
+ OXYGEN_I2S_BITS_MASK);
+ }
if (!is_ac97) {
guard(mutex)(&chip->mutex);
is_spdif = chip->model.device_config & CAPTURE_1_FROM_SPDIF;
- spin_lock_irq(&chip->reg_lock);
- oxygen_write8_masked(chip, OXYGEN_REC_FORMAT,
- oxygen_format(hw_params) << OXYGEN_REC_FORMAT_C_SHIFT,
- OXYGEN_REC_FORMAT_C_MASK);
- if (!is_spdif)
- oxygen_write16_masked(chip, OXYGEN_I2S_C_FORMAT,
- oxygen_rate(hw_params) |
- chip->model.adc_i2s_format |
- get_mclk(chip, PCM_B, hw_params) |
- oxygen_i2s_bits(hw_params),
- OXYGEN_I2S_RATE_MASK |
- OXYGEN_I2S_FORMAT_MASK |
- OXYGEN_I2S_MCLK_MASK |
- OXYGEN_I2S_BITS_MASK);
- spin_unlock_irq(&chip->reg_lock);
+ scoped_guard(spinlock_irq, &chip->reg_lock) {
+ oxygen_write8_masked(chip, OXYGEN_REC_FORMAT,
+ oxygen_format(hw_params) << OXYGEN_REC_FORMAT_C_SHIFT,
+ OXYGEN_REC_FORMAT_C_MASK);
+ if (!is_spdif)
+ oxygen_write16_masked(chip, OXYGEN_I2S_C_FORMAT,
+ oxygen_rate(hw_params) |
+ chip->model.adc_i2s_format |
+ get_mclk(chip, PCM_B, hw_params) |
+ oxygen_i2s_bits(hw_params),
+ OXYGEN_I2S_RATE_MASK |
+ OXYGEN_I2S_FORMAT_MASK |
+ OXYGEN_I2S_MCLK_MASK |
+ OXYGEN_I2S_BITS_MASK);
+ }
if (!is_spdif) {
guard(mutex)(&chip->mutex);
return err;
guard(mutex)(&chip->mutex);
- spin_lock_irq(&chip->reg_lock);
+ guard(spinlock_irq)(&chip->reg_lock);
oxygen_clear_bits32(chip, OXYGEN_SPDIF_CONTROL,
OXYGEN_SPDIF_OUT_ENABLE);
oxygen_write8_masked(chip, OXYGEN_PLAY_FORMAT,
oxygen_rate(hw_params) << OXYGEN_SPDIF_OUT_RATE_SHIFT,
OXYGEN_SPDIF_OUT_RATE_MASK);
oxygen_update_spdif_source(chip);
- spin_unlock_irq(&chip->reg_lock);
return 0;
}
return err;
guard(mutex)(&chip->mutex);
- spin_lock_irq(&chip->reg_lock);
- oxygen_write8_masked(chip, OXYGEN_PLAY_CHANNELS,
- oxygen_play_channels(hw_params),
- OXYGEN_PLAY_CHANNELS_MASK);
- oxygen_write8_masked(chip, OXYGEN_PLAY_FORMAT,
- oxygen_format(hw_params) << OXYGEN_MULTICH_FORMAT_SHIFT,
- OXYGEN_MULTICH_FORMAT_MASK);
- oxygen_write16_masked(chip, OXYGEN_I2S_MULTICH_FORMAT,
- oxygen_rate(hw_params) |
- chip->model.dac_i2s_format |
- get_mclk(chip, PCM_MULTICH, hw_params) |
- oxygen_i2s_bits(hw_params),
- OXYGEN_I2S_RATE_MASK |
- OXYGEN_I2S_FORMAT_MASK |
- OXYGEN_I2S_MCLK_MASK |
- OXYGEN_I2S_BITS_MASK);
- oxygen_update_spdif_source(chip);
- spin_unlock_irq(&chip->reg_lock);
+ scoped_guard(spinlock_irq, &chip->reg_lock) {
+ oxygen_write8_masked(chip, OXYGEN_PLAY_CHANNELS,
+ oxygen_play_channels(hw_params),
+ OXYGEN_PLAY_CHANNELS_MASK);
+ oxygen_write8_masked(chip, OXYGEN_PLAY_FORMAT,
+ oxygen_format(hw_params) << OXYGEN_MULTICH_FORMAT_SHIFT,
+ OXYGEN_MULTICH_FORMAT_MASK);
+ oxygen_write16_masked(chip, OXYGEN_I2S_MULTICH_FORMAT,
+ oxygen_rate(hw_params) |
+ chip->model.dac_i2s_format |
+ get_mclk(chip, PCM_MULTICH, hw_params) |
+ oxygen_i2s_bits(hw_params),
+ OXYGEN_I2S_RATE_MASK |
+ OXYGEN_I2S_FORMAT_MASK |
+ OXYGEN_I2S_MCLK_MASK |
+ OXYGEN_I2S_BITS_MASK);
+ oxygen_update_spdif_source(chip);
+ }
chip->model.set_dac_params(chip, hw_params);
oxygen_update_dac_routing(chip);
unsigned int channel = oxygen_substream_channel(substream);
unsigned int channel_mask = 1 << channel;
- spin_lock_irq(&chip->reg_lock);
+ guard(spinlock_irq)(&chip->reg_lock);
chip->interrupt_mask &= ~channel_mask;
oxygen_write16(chip, OXYGEN_INTERRUPT_MASK, chip->interrupt_mask);
oxygen_set_bits8(chip, OXYGEN_DMA_FLUSH, channel_mask);
oxygen_clear_bits8(chip, OXYGEN_DMA_FLUSH, channel_mask);
- spin_unlock_irq(&chip->reg_lock);
return 0;
}
{
struct oxygen *chip = snd_pcm_substream_chip(substream);
- spin_lock_irq(&chip->reg_lock);
- oxygen_clear_bits32(chip, OXYGEN_SPDIF_CONTROL,
- OXYGEN_SPDIF_OUT_ENABLE);
- spin_unlock_irq(&chip->reg_lock);
+ scoped_guard(spinlock_irq, &chip->reg_lock) {
+ oxygen_clear_bits32(chip, OXYGEN_SPDIF_CONTROL,
+ OXYGEN_SPDIF_OUT_ENABLE);
+ }
return oxygen_hw_free(substream);
}
unsigned int channel = oxygen_substream_channel(substream);
unsigned int channel_mask = 1 << channel;
- spin_lock_irq(&chip->reg_lock);
+ guard(spinlock_irq)(&chip->reg_lock);
oxygen_set_bits8(chip, OXYGEN_DMA_FLUSH, channel_mask);
oxygen_clear_bits8(chip, OXYGEN_DMA_FLUSH, channel_mask);
else
chip->interrupt_mask |= channel_mask;
oxygen_write16(chip, OXYGEN_INTERRUPT_MASK, chip->interrupt_mask);
- spin_unlock_irq(&chip->reg_lock);
return 0;
}
}
}
- spin_lock(&chip->reg_lock);
+ guard(spinlock)(&chip->reg_lock);
if (!pausing) {
if (cmd == SNDRV_PCM_TRIGGER_START)
chip->pcm_running |= mask;
else
oxygen_clear_bits8(chip, OXYGEN_DMA_PAUSE, mask);
}
- spin_unlock(&chip->reg_lock);
return 0;
}