drm/amd/display: limit the v_startup workaround to ASICs older than DCN3.1

Since, calling dcn20_adjust_freesync_v_startup() on DCN3.1+ ASICs
can cause the display to flicker and underflow to occur, we shouldn't
call it for them. So, ensure that the DCN version is less than
DCN_VERSION_3_1 before calling dcn20_adjust_freesync_v_startup().

Cc: stable@vger.kernel.org
Reviewed-by: Fangzhi Zuo <jerry.zuo@amd.com>
Signed-off-by: Hamza Mahfooz <hamza.mahfooz@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>

diff --git a/drivers/gpu/drm/amd/display/dc/dml/dcn20/dcn20_fpu.c b/drivers/gpu/drm/amd/display/dc/dml/dcn20/dcn20_fpu.c
index d01bc2dff49b419044c57f630721fb19739132ed..5805fb02af14e37c9af22710dc85de9606b86e17 100644 (file)
--- a/drivers/gpu/drm/amd/display/dc/dml/dcn20/dcn20_fpu.c
+++ b/drivers/gpu/drm/amd/display/dc/dml/dcn20/dcn20_fpu.c
@@ -1099,7 +1099,8 @@ void dcn20_calculate_dlg_params(struct dc *dc,
                context->res_ctx.pipe_ctx[i].plane_res.bw.dppclk_khz =
                                                pipes[pipe_idx].clks_cfg.dppclk_mhz * 1000;
                context->res_ctx.pipe_ctx[i].pipe_dlg_param = pipes[pipe_idx].pipe.dest;
-               if (context->res_ctx.pipe_ctx[i].stream->adaptive_sync_infopacket.valid)
+               if (dc->ctx->dce_version < DCN_VERSION_3_1 &&
+                   context->res_ctx.pipe_ctx[i].stream->adaptive_sync_infopacket.valid)
                        dcn20_adjust_freesync_v_startup(
                                &context->res_ctx.pipe_ctx[i].stream->timing,
                                &context->res_ctx.pipe_ctx[i].pipe_dlg_param.vstartup_start);