#define DMA_ADDR_1_HIGH                                XE_REG(0xc30c)
 #define   DMA_ADDR_SPACE_MASK                  REG_GENMASK(20, 16)
 #define   DMA_ADDRESS_SPACE_WOPCM              REG_FIELD_PREP(DMA_ADDR_SPACE_MASK, 7)
+#define   DMA_ADDRESS_SPACE_GGTT               REG_FIELD_PREP(DMA_ADDR_SPACE_MASK, 8)
 #define DMA_COPY_SIZE                          XE_REG(0xc310)
 #define DMA_CTRL                               XE_REG(0xc314)
 #define   HUC_UKERNEL                          REG_BIT(9)
 
        /* Set the source address for the uCode */
        src_offset = uc_fw_ggtt_offset(uc_fw) + uc_fw->css_offset;
        xe_mmio_write32(gt, DMA_ADDR_0_LOW, lower_32_bits(src_offset));
-       xe_mmio_write32(gt, DMA_ADDR_0_HIGH, upper_32_bits(src_offset));
+       xe_mmio_write32(gt, DMA_ADDR_0_HIGH,
+                       upper_32_bits(src_offset) | DMA_ADDRESS_SPACE_GGTT);
 
        /* Set the DMA destination */
        xe_mmio_write32(gt, DMA_ADDR_1_LOW, offset);