kfree(container_of(vd, struct omap_desc, vd));
 }
 
+static void omap_dma_clear_csr(struct omap_chan *c)
+{
+       if (dma_omap1())
+               c->plat->dma_read(CSR, c->dma_ch);
+       else
+               c->plat->dma_write(~0, CSR, c->dma_ch);
+}
+
 static void omap_dma_start(struct omap_chan *c, struct omap_desc *d)
 {
        struct omap_dmadev *od = to_omap_dma_dev(c->vc.chan.device);
        } else if (od->plat->errata & DMA_ERRATA_PARALLEL_CHANNELS)
                c->plat->dma_write(c->dma_ch, CLNK_CTRL, c->dma_ch);
 
-       /* Clear CSR */
-       if (dma_omap1())
-               c->plat->dma_read(CSR, c->dma_ch);
-       else
-               c->plat->dma_write(~0, CSR, c->dma_ch);
+       omap_dma_clear_csr(c);
 
        /* Enable interrupts */
        c->plat->dma_write(d->cicr, CICR, c->dma_ch);
        /* disable irq */
        c->plat->dma_write(0, CICR, c->dma_ch);
 
-       /* Clear CSR */
-       if (dma_omap1())
-               c->plat->dma_read(CSR, c->dma_ch);
-       else
-               c->plat->dma_write(~0, CSR, c->dma_ch);
+       omap_dma_clear_csr(c);
 
        val = c->plat->dma_read(CCR, c->dma_ch);
        if (od->plat->errata & DMA_ERRATA_i541 && val & CCR_TRIGGER_SRC) {