hw/mips: use qemu_create_nic_device()

The Jazz and MIPS SIM platforms both instantiate their NIC only if a
corresponding configuration exists for it. Convert them to use the
qemu_create_nic_device() function for that.

Signed-off-by: David Woodhouse <dwmw@amazon.co.uk>

diff --git a/hw/mips/jazz.c b/hw/mips/jazz.c
index c32d2b0b0a1d2c94543ce113fdff561bd88b09fa..b0f4aa27637b090fe6e444aa4c4991e938e32182 100644 (file)
--- a/hw/mips/jazz.c
+++ b/hw/mips/jazz.c
@@ -114,7 +114,7 @@ static const MemoryRegionOps dma_dummy_ops = {
     .endianness = DEVICE_NATIVE_ENDIAN,
 };
 
-static void mips_jazz_init_net(NICInfo *nd, IOMMUMemoryRegion *rc4030_dma_mr,
+static void mips_jazz_init_net(IOMMUMemoryRegion *rc4030_dma_mr,
                                DeviceState *rc4030, MemoryRegion *dp8393x_prom)
 {
     DeviceState *dev;
@@ -122,10 +122,11 @@ static void mips_jazz_init_net(NICInfo *nd, IOMMUMemoryRegion *rc4030_dma_mr,
     int checksum, i;
     uint8_t *prom;
 
-    qemu_check_nic_model(nd, "dp83932");
+    dev = qemu_create_nic_device("dp8393x", true, "dp82932");
+    if (!dev) {
+        return;
+    }
 
-    dev = qdev_new("dp8393x");
-    qdev_set_nic_properties(dev, nd);
     qdev_prop_set_uint8(dev, "it_shift", 2);
     qdev_prop_set_bit(dev, "big_endian", TARGET_BIG_ENDIAN);
     object_property_set_link(OBJECT(dev), "dma_mr",
@@ -314,12 +315,7 @@ static void mips_jazz_init(MachineState *machine,
     }
 
     /* Network controller */
-    if (nb_nics == 1) {
-        mips_jazz_init_net(&nd_table[0], rc4030_dma_mr, rc4030, dp8393x_prom);
-    } else if (nb_nics > 1) {
-        error_report("This machine only supports one NIC");
-        exit(1);
-    }
+    mips_jazz_init_net(rc4030_dma_mr, rc4030, dp8393x_prom);
 
     /* SCSI adapter */
     dev = qdev_new(TYPE_SYSBUS_ESP);

diff --git a/hw/mips/mipssim.c b/hw/mips/mipssim.c
index 2f951f7fc6d7c9e18d7fc9cda0a71a1d7fac507e..072864f539d4751abc2d715a362b514e9728dda4 100644 (file)
--- a/hw/mips/mipssim.c
+++ b/hw/mips/mipssim.c
@@ -111,13 +111,15 @@ static void main_cpu_reset(void *opaque)
     }
 }
 
-static void mipsnet_init(int base, qemu_irq irq, NICInfo *nd)
+static void mipsnet_init(int base, qemu_irq irq)
 {
     DeviceState *dev;
     SysBusDevice *s;
 
-    dev = qdev_new("mipsnet");
-    qdev_set_nic_properties(dev, nd);
+    dev = qemu_create_nic_device("mipsnet", true, NULL);
+    if (!dev) {
+        return;
+    }
 
     s = SYS_BUS_DEVICE(dev);
     sysbus_realize_and_unref(s, &error_fatal);
@@ -218,9 +220,8 @@ mips_mipssim_init(MachineState *machine)
                       sysbus_mmio_get_region(SYS_BUS_DEVICE(dev), 0));
     }
 
-    if (nd_table[0].used)
-        /* MIPSnet uses the MIPS CPU INT0, which is interrupt 2. */
-        mipsnet_init(0x4200, env->irq[2], &nd_table[0]);
+    /* MIPSnet uses the MIPS CPU INT0, which is interrupt 2. */
+    mipsnet_init(0x4200, env->irq[2]);
 }
 
 static void mips_mipssim_machine_init(MachineClass *mc)