Patch by David Müller, 17 Sep 2002:

fix SMDK2410 configuration.
add (compile time selectable) support for LV400 and LV800 flash.

diff --git a/CHANGELOG b/CHANGELOG
index e4711293198a0c65dc66c7f1e5b1f3691b9c09cb..908537a703b8499e29da2bf74741054f96a8f5a2 100644 (file)
--- a/CHANGELOG
+++ b/CHANGELOG
@@ -10,6 +10,10 @@ Modifications for 1.2.0:
 
 For details about the current modifications, please see README-WIP
 
+* Patch by David Müller, 17 Sep 2002:
+  fix SMDK2410 configuration.
+  add (compile time selectable) support for LV400 and LV800 flash.
+
 * Patch by Frank Gottschling, 11 Sep 2002:
   - removed board/eltec/bab750 and cpu/mpc75x
   - added new board BAB7xx (for BAB740/BAB750)

diff --git a/board/smdk2410/config.mk b/board/smdk2410/config.mk
index aba735da3ef0416875a5b76be34bc06fdee745b3..e61bea0e4296b83c3b2583ca070d258dc3d5db55 100644 (file)
--- a/board/smdk2410/config.mk
+++ b/board/smdk2410/config.mk
@@ -9,17 +9,17 @@
 #
 
 #
-# SMDK2410 has 1 bank of 32 MB DRAM
+# SMDK2410 has 1 bank of 64 MB DRAM
 #
-# 3000'0000 to 3200'0000
+# 3000'0000 to 3400'0000
 #
-# Linux-Kernel is expected to be at 3000'0000, entry 3000'0000
+# Linux-Kernel is expected to be at 3000'8000, entry 3000'8000
 # optionally with a ramdisk at 3080'0000
 #
-# we load ourself to 31F0'0000
+# we load ourself to 33F0'0000
 #
-# download areas is 3100'0000
+# download areas is 3300'0000
 #
 
 
-TEXT_BASE = 0x31F00000
+TEXT_BASE = 0x33F00000

diff --git a/board/smdk2410/flash.c b/board/smdk2410/flash.c
index fb25902df2a44da159355379947ccfd0afe9f444..3f12dac7d3de21229e51286fdb92a9c918ed860f 100644 (file)
--- a/board/smdk2410/flash.c
+++ b/board/smdk2410/flash.c
@@ -65,8 +65,15 @@ ulong flash_init(void)
     {
        ulong flashbase = 0;
        flash_info[i].flash_id =
+#if defined(CONFIG_AMD_LV400)
          (AMD_MANUFACT & FLASH_VENDMASK) |
          (AMD_ID_LV400B & FLASH_TYPEMASK);
+#elif defined(CONFIG_AMD_LV800)
+         (AMD_MANUFACT & FLASH_VENDMASK) |
+         (AMD_ID_LV800B & FLASH_TYPEMASK);
+#else
+#error "Unknown flash configured"
+#endif
        flash_info[i].size = FLASH_BANK_SIZE;
        flash_info[i].sector_count = CFG_MAX_FLASH_SECT;
        memset(flash_info[i].protect, 0, CFG_MAX_FLASH_SECT);
@@ -76,7 +83,6 @@ ulong flash_init(void)
          panic("configured to many flash banks!\n");
        for (j = 0; j < flash_info[i].sector_count; j++)
        {
-
            if (j <= 3)
            {
                /* 1st one is 16 KB */

diff --git a/board/smdk2410/smdk2410.c b/board/smdk2410/smdk2410.c
index 587ed646266caac6c37eda73bd0c838376cc00d0..5ce2778894263cadd161f979147eb315ff5057c7 100644 (file)
--- a/board/smdk2410/smdk2410.c
+++ b/board/smdk2410/smdk2410.c
@@ -107,6 +107,9 @@ int board_init (void)
        /* adress of boot parameters */
        gd->bd->bi_boot_params = 0x30000100;
 
+       icache_enable(); 
+       dcache_enable(); 
+
        return 0;
 }
 

diff --git a/include/configs/smdk2410.h b/include/configs/smdk2410.h
index 16b0aecacacededa62c542a830748dd7af19628f..3603f4a95a33661d0244425140d2b6f625b85511 100644 (file)
--- a/include/configs/smdk2410.h
+++ b/include/configs/smdk2410.h
@@ -41,7 +41,7 @@
  */
 #define CONFIG_ARM920T         1       /* This is an ARM920T Core      */
 #define        CONFIG_S3C2410          1       /* in a SAMSUNG S3C2410 SoC     */
-#define CONFIG_SMDK2410                1       /* on an SAMSUNG SMDK2410 Board */
+#define CONFIG_SMDK2410                1       /* on a SAMSUNG SMDK2410 Board  */
 
 #define USE_920T_MMU           1
 #undef CONFIG_USE_IRQ                  /* we don't need IRQ/FIQ stuff */
@@ -103,11 +103,11 @@
 #define CFG_BARGSIZE           CFG_CBSIZE      /* Boot Argument Buffer Size    */
 
 #define CFG_MEMTEST_START      0x30000000      /* memtest works on     */
-#define CFG_MEMTEST_END                0x31F00000      /* 31 MB in DRAM        */
+#define CFG_MEMTEST_END                0x33F00000      /* 63 MB in DRAM        */
 
 #undef  CFG_CLKS_IN_HZ         /* everything, incl board info, in Hz */
 
-#define        CFG_LOAD_ADDR           0x31000000      /* default load address */
+#define        CFG_LOAD_ADDR           0x33000000      /* default load address */
 
 /* the PWM TImer 4 uses a counter of 15625 for 10 ms, so we need */
 /* it to wrap 100 times (total 1562500) to get 1 sec. */
@@ -132,25 +132,38 @@
  */
 #define CONFIG_NR_DRAM_BANKS   1          /* we have 1 bank of DRAM */
 #define PHYS_SDRAM_1           0x30000000 /* SDRAM Bank #1 */
-#define PHYS_SDRAM_1_SIZE      0x02000000 /* 32 MB */
+#define PHYS_SDRAM_1_SIZE      0x04000000 /* 64 MB */
 
 #define PHYS_FLASH_1           0x00000000 /* Flash Bank #1 */
-#define PHYS_FLASH_SIZE                0x00100000 /* 1 MB */
 
 #define CFG_FLASH_BASE         PHYS_FLASH_1
 
 /*-----------------------------------------------------------------------
  * FLASH and environment organization
  */
+
+#define CONFIG_AMD_LV400       1       /* uncomment this if you have a LV400 flash */
+#if 0
+#define CONFIG_AMD_LV800       1       /* uncomment this if you have a LV800 flash */
+#endif
+
 #define CFG_MAX_FLASH_BANKS    1       /* max number of memory banks */
+#ifdef CONFIG_AMD_LV800
+#define PHYS_FLASH_SIZE                0x00100000 /* 1MB */
 #define CFG_MAX_FLASH_SECT     (19)    /* max number of sectors on one chip */
+#define CFG_ENV_ADDR           (CFG_FLASH_BASE + 0x0F0000) /* addr of environment */
+#endif
+#ifdef CONFIG_AMD_LV400
+#define PHYS_FLASH_SIZE                0x00080000 /* 512KB */
+#define CFG_MAX_FLASH_SECT     (11)    /* max number of sectors on one chip */
+#define CFG_ENV_ADDR           (CFG_FLASH_BASE + 0x070000) /* addr of environment */
+#endif
 
 /* timeout values are in ticks */
 #define CFG_FLASH_ERASE_TOUT   (5*CFG_HZ) /* Timeout for Flash Erase */
 #define CFG_FLASH_WRITE_TOUT   (5*CFG_HZ) /* Timeout for Flash Write */
 
 #define        CFG_ENV_IS_IN_FLASH     1
-#define CFG_ENV_ADDR           (CFG_FLASH_BASE + 0x0F0000)     /* Addr of Environment Sector   */
 #define CFG_ENV_SIZE           0x10000 /* Total Size of Environment Sector */
 
 #endif /* __CONFIG_H */