drm/i915/psr: LunarLake IO and Fast Wake time line count maximums are 68

On LunarLake maximum for IO and Fast Wake time line counts are 68: 6 bits +
5 lines added by the HW. Take this into account in calculation and when
writing the IO Wake lines.

v2: maximum line count is 68 (6 bits + 5 lines added by HW)

Signed-off-by: Jouni Högander <jouni.hogander@intel.com>
Reviewed-by: Uma Shankar <uma.shankar@intel.com>
Link: https://patchwork.freedesktop.org/patch/msgid/20240517073005.2414293-2-jouni.hogander@intel.com

diff --git a/drivers/gpu/drm/i915/display/intel_psr.c b/drivers/gpu/drm/i915/display/intel_psr.c
index df0d14a5023f389ec75caadd1c94737a25170a4a..f5d3eb776833b6e219c7d1f49b8fee1808ac852e 100644 (file)
--- a/drivers/gpu/drm/i915/display/intel_psr.c
+++ b/drivers/gpu/drm/i915/display/intel_psr.c
@@ -1421,8 +1421,9 @@ static bool _compute_alpm_params(struct intel_dp *intel_dp,
        fast_wake_time = precharge + preamble + phy_wake +
                tfw_exit_latency;
 
-       if (DISPLAY_VER(i915) >= 12)
-               /* TODO: Check how we can use ALPM_CTL fast wake extended field */
+       if (DISPLAY_VER(i915) >= 20)
+               max_wake_lines = 68;
+       else if (DISPLAY_VER(i915) >= 12)
                max_wake_lines = 12;
        else
                max_wake_lines = 8;