{
        struct amdgpu_dm_connector *aconnector = to_amdgpu_dm_connector(connector);
        struct amdgpu_dm_connector *master = aconnector->mst_port;
+       struct drm_dp_mst_port *port = aconnector->port;
+       int connection_status;
 
        if (drm_connector_is_unregistered(connector))
                return connector_status_disconnected;
 
-       return drm_dp_mst_detect_port(connector, ctx, &master->mst_mgr,
+       connection_status = drm_dp_mst_detect_port(connector, ctx, &master->mst_mgr,
                                      aconnector->port);
+
+       if (port->pdt != DP_PEER_DEVICE_NONE && !port->dpcd_rev) {
+               uint8_t dpcd_rev;
+               int ret;
+
+               ret = drm_dp_dpcd_readb(&port->aux, DP_DP13_DPCD_REV, &dpcd_rev);
+
+               if (ret == 1) {
+                       port->dpcd_rev = dpcd_rev;
+
+                       /* Could be DP1.2 DP Rx case*/
+                       if (!dpcd_rev) {
+                               ret = drm_dp_dpcd_readb(&port->aux, DP_DPCD_REV, &dpcd_rev);
+
+                               if (ret == 1)
+                                       port->dpcd_rev = dpcd_rev;
+                       }
+
+                       if (!dpcd_rev)
+                               DRM_DEBUG_KMS("Can't decide DPCD revision number!");
+               }
+
+               /*
+                * Could be legacy sink, logical port etc on DP1.2.
+                * Will get Nack under these cases when issue remote
+                * DPCD read.
+                */
+               if (ret != 1)
+                       DRM_DEBUG_KMS("Can't access DPCD");
+       } else if (port->pdt == DP_PEER_DEVICE_NONE) {
+               port->dpcd_rev = 0;
+       }
+
+       return connection_status;
 }
 
 static int dm_dp_mst_atomic_check(struct drm_connector *connector,