drm/panel: support for auo, kd101n80-45na wuxga dsi video mode panel

Auo,kd101n80-45na's connector is same as boe,tv101wum-nl6.
The most codes can be reuse.
So auo,kd101n80-45na and boe,tv101wum-nl6 use one driver file.
Add the different parts in driver data.

Signed-off-by: Jitao Shi <jitao.shi@mediatek.com>
Reviewed-by: Sam Ravnborg <sam@ravnborg.org>
Signed-off-by: Sam Ravnborg <sam@ravnborg.org>
Link: https://patchwork.freedesktop.org/patch/msgid/20200116021511.22675-4-jitao.shi@mediatek.com

diff --git a/drivers/gpu/drm/panel/Kconfig b/drivers/gpu/drm/panel/Kconfig
index ca727c233a9af9c074461dfdbfffc711d8485ab2..b5413edd625bf16dfbae48c3df443a95a02f50d0 100644 (file)
--- a/drivers/gpu/drm/panel/Kconfig
+++ b/drivers/gpu/drm/panel/Kconfig
@@ -30,13 +30,13 @@ config DRM_PANEL_BOE_HIMAX8279D
          the host and has a built-in LED backlight.
 
 config DRM_PANEL_BOE_TV101WUM_NL6
-       tristate "BOE TV101WUM 1200x1920 panel"
+       tristate "BOE TV101WUM and AUO KD101N80 45NA 1200x1920 panel"
        depends on OF
        depends on DRM_MIPI_DSI
        depends on BACKLIGHT_CLASS_DEVICE
        help
-         Say Y here if you want to support for BOE TV101WUM WUXGA PANEL
-         DSI Video Mode panel
+         Say Y here if you want to support for BOE TV101WUM and AUO KD101N80
+         45NA WUXGA PANEL DSI Video Mode panel
 
 config DRM_PANEL_LVDS
        tristate "Generic LVDS panel driver"

diff --git a/drivers/gpu/drm/panel/panel-boe-tv101wum-nl6.c b/drivers/gpu/drm/panel/panel-boe-tv101wum-nl6.c
index 51fde588adc1198fe9a9315c9d1b724a7c024786..2160144ca51b9e4cae86f2394f897b7488ae041b 100644 (file)
--- a/drivers/gpu/drm/panel/panel-boe-tv101wum-nl6.c
+++ b/drivers/gpu/drm/panel/panel-boe-tv101wum-nl6.c
@@ -34,6 +34,7 @@ struct panel_desc {
        enum mipi_dsi_pixel_format format;
        const struct panel_init_cmd *init_cmds;
        unsigned int lanes;
+       bool discharge_on_disable;
 };
 
 struct boe_panel {
@@ -367,6 +368,15 @@ static const struct panel_init_cmd boe_init_cmd[] = {
        {},
 };
 
+static const struct panel_init_cmd auo_kd101n80_45na_init_cmd[] = {
+       _INIT_DELAY_CMD(24),
+       _INIT_DCS_CMD(0x11),
+       _INIT_DELAY_CMD(120),
+       _INIT_DCS_CMD(0x29),
+       _INIT_DELAY_CMD(120),
+       {},
+};
+
 static inline struct boe_panel *to_boe_panel(struct drm_panel *panel)
 {
        return container_of(panel, struct boe_panel, base);
@@ -444,12 +454,22 @@ static int boe_panel_unprepare(struct drm_panel *panel)
        }
 
        msleep(150);
-       gpiod_set_value(boe->enable_gpio, 0);
-       usleep_range(500, 1000);
-       regulator_disable(boe->avee);
-       regulator_disable(boe->avdd);
-       usleep_range(5000, 7000);
-       regulator_disable(boe->pp1800);
+
+       if (boe->desc->discharge_on_disable) {
+               regulator_disable(boe->avee);
+               regulator_disable(boe->avdd);
+               usleep_range(5000, 7000);
+               gpiod_set_value(boe->enable_gpio, 0);
+               usleep_range(5000, 7000);
+               regulator_disable(boe->pp1800);
+       } else {
+               gpiod_set_value(boe->enable_gpio, 0);
+               usleep_range(500, 1000);
+               regulator_disable(boe->avee);
+               regulator_disable(boe->avdd);
+               usleep_range(5000, 7000);
+               regulator_disable(boe->pp1800);
+       }
 
        boe->prepared = false;
 
@@ -542,6 +562,35 @@ static const struct panel_desc boe_tv101wum_nl6_desc = {
        .mode_flags = MIPI_DSI_MODE_VIDEO | MIPI_DSI_MODE_VIDEO_SYNC_PULSE |
                      MIPI_DSI_MODE_LPM,
        .init_cmds = boe_init_cmd,
+       .discharge_on_disable = false,
+};
+
+static const struct drm_display_mode auo_kd101n80_45na_default_mode = {
+       .clock = 157000,
+       .hdisplay = 1200,
+       .hsync_start = 1200 + 80,
+       .hsync_end = 1200 + 80 + 24,
+       .htotal = 1200 + 80 + 24 + 36,
+       .vdisplay = 1920,
+       .vsync_start = 1920 + 16,
+       .vsync_end = 1920 + 16 + 4,
+       .vtotal = 1920 + 16 + 4 + 16,
+       .vrefresh = 60,
+};
+
+static const struct panel_desc auo_kd101n80_45na_desc = {
+       .modes = &auo_kd101n80_45na_default_mode,
+       .bpc = 8,
+       .size = {
+               .width_mm = 135,
+               .height_mm = 216,
+       },
+       .lanes = 4,
+       .format = MIPI_DSI_FMT_RGB888,
+       .mode_flags = MIPI_DSI_MODE_VIDEO | MIPI_DSI_MODE_VIDEO_SYNC_PULSE |
+                     MIPI_DSI_MODE_LPM,
+       .init_cmds = auo_kd101n80_45na_init_cmd,
+       .discharge_on_disable = true,
 };
 
 static int boe_panel_get_modes(struct drm_panel *panel,
@@ -673,6 +722,9 @@ static const struct of_device_id boe_of_match[] = {
        { .compatible = "boe,tv101wum-nl6",
          .data = &boe_tv101wum_nl6_desc
        },
+       { .compatible = "auo,kd101n80-45na",
+         .data = &auo_kd101n80_45na_desc
+       },
        { /* sentinel */ }
 };
 MODULE_DEVICE_TABLE(of, boe_of_match);