iio: adc: meson: simplify MESON_SAR_ADC_REG11 register access

Simply check the max_register value to decide whether
MESON_SAR_ADC_REG11 is present on the current IP revision. This allows
dropping two additional bool fields from struct meson_sar_adc_param
which previously had to be manually kept in sync. No functional changes
intended.

Signed-off-by: Martin Blumenstingl <martin.blumenstingl@googlemail.com>
Link: https://patch.msgid.link/20241224142941.97759-4-martin.blumenstingl@googlemail.com
Signed-off-by: Jonathan Cameron <Jonathan.Cameron@huawei.com>

diff --git a/drivers/iio/adc/meson_saradc.c b/drivers/iio/adc/meson_saradc.c
index 469af3c5706601dbc2ca9d4625ee66e544ef0d8a..997def4a4d2f5723280f31341b85ab3a3c5f34f8 100644 (file)
--- a/drivers/iio/adc/meson_saradc.c
+++ b/drivers/iio/adc/meson_saradc.c
@@ -315,14 +315,12 @@ static const struct iio_chan_spec meson_sar_adc_and_temp_iio_channels[] = {
 struct meson_sar_adc_param {
        bool                                    has_bl30_integration;
        unsigned long                           clock_rate;
-       u32                                     bandgap_reg;
        unsigned int                            resolution;
        const struct regmap_config              *regmap_config;
        u8                                      temperature_trimming_bits;
        unsigned int                            temperature_multiplier;
        unsigned int                            temperature_divider;
        u8                                      disable_ring_counter;
-       bool                                    has_reg11;
        bool                                    has_vref_select;
        u8                                      vref_select;
        u8                                      cmv_select;
@@ -976,7 +974,7 @@ static int meson_sar_adc_init(struct iio_dev *indio_dev)
                           MESON_SAR_ADC_REG3_CTRL_CONT_RING_COUNTER_EN,
                           regval);
 
-       if (priv->param->has_reg11) {
+       if (priv->param->regmap_config->max_register >= MESON_SAR_ADC_REG11) {
                regval = FIELD_PREP(MESON_SAR_ADC_REG11_EOC, priv->param->adc_eoc);
                regmap_update_bits(priv->regmap, MESON_SAR_ADC_REG11,
                                   MESON_SAR_ADC_REG11_EOC, regval);
@@ -1013,16 +1011,15 @@ static int meson_sar_adc_init(struct iio_dev *indio_dev)
 static void meson_sar_adc_set_bandgap(struct iio_dev *indio_dev, bool on_off)
 {
        struct meson_sar_adc_priv *priv = iio_priv(indio_dev);
-       const struct meson_sar_adc_param *param = priv->param;
-       u32 enable_mask;
 
-       if (param->bandgap_reg == MESON_SAR_ADC_REG11)
-               enable_mask = MESON_SAR_ADC_REG11_BANDGAP_EN;
+       if (priv->param->regmap_config->max_register >= MESON_SAR_ADC_REG11)
+               regmap_update_bits(priv->regmap, MESON_SAR_ADC_REG11,
+                                  MESON_SAR_ADC_REG11_BANDGAP_EN,
+                                  on_off ? MESON_SAR_ADC_REG11_BANDGAP_EN : 0);
        else
-               enable_mask = MESON_SAR_ADC_DELTA_10_TS_VBG_EN;
-
-       regmap_update_bits(priv->regmap, param->bandgap_reg, enable_mask,
-                          on_off ? enable_mask : 0);
+               regmap_update_bits(priv->regmap, MESON_SAR_ADC_DELTA_10,
+                                  MESON_SAR_ADC_DELTA_10_TS_VBG_EN,
+                                  on_off ? MESON_SAR_ADC_DELTA_10_TS_VBG_EN : 0);
 }
 
 static int meson_sar_adc_hw_enable(struct iio_dev *indio_dev)
@@ -1186,7 +1183,6 @@ static const struct iio_info meson_sar_adc_iio_info = {
 static const struct meson_sar_adc_param meson_sar_adc_meson8_param = {
        .has_bl30_integration = false,
        .clock_rate = 1150000,
-       .bandgap_reg = MESON_SAR_ADC_DELTA_10,
        .regmap_config = &meson_sar_adc_regmap_config_meson8,
        .resolution = 10,
        .temperature_trimming_bits = 4,
@@ -1197,7 +1193,6 @@ static const struct meson_sar_adc_param meson_sar_adc_meson8_param = {
 static const struct meson_sar_adc_param meson_sar_adc_meson8b_param = {
        .has_bl30_integration = false,
        .clock_rate = 1150000,
-       .bandgap_reg = MESON_SAR_ADC_DELTA_10,
        .regmap_config = &meson_sar_adc_regmap_config_meson8,
        .resolution = 10,
        .temperature_trimming_bits = 5,
@@ -1208,10 +1203,8 @@ static const struct meson_sar_adc_param meson_sar_adc_meson8b_param = {
 static const struct meson_sar_adc_param meson_sar_adc_gxbb_param = {
        .has_bl30_integration = true,
        .clock_rate = 1200000,
-       .bandgap_reg = MESON_SAR_ADC_REG11,
        .regmap_config = &meson_sar_adc_regmap_config_gxbb,
        .resolution = 10,
-       .has_reg11 = true,
        .vref_voltage = 1,
        .cmv_select = 1,
 };
@@ -1219,11 +1212,9 @@ static const struct meson_sar_adc_param meson_sar_adc_gxbb_param = {
 static const struct meson_sar_adc_param meson_sar_adc_gxl_param = {
        .has_bl30_integration = true,
        .clock_rate = 1200000,
-       .bandgap_reg = MESON_SAR_ADC_REG11,
        .regmap_config = &meson_sar_adc_regmap_config_gxbb,
        .resolution = 12,
        .disable_ring_counter = 1,
-       .has_reg11 = true,
        .vref_voltage = 1,
        .cmv_select = 1,
 };
@@ -1231,11 +1222,9 @@ static const struct meson_sar_adc_param meson_sar_adc_gxl_param = {
 static const struct meson_sar_adc_param meson_sar_adc_axg_param = {
        .has_bl30_integration = true,
        .clock_rate = 1200000,
-       .bandgap_reg = MESON_SAR_ADC_REG11,
        .regmap_config = &meson_sar_adc_regmap_config_gxbb,
        .resolution = 12,
        .disable_ring_counter = 1,
-       .has_reg11 = true,
        .vref_voltage = 1,
        .has_vref_select = true,
        .vref_select = VREF_VDDA,
@@ -1245,11 +1234,9 @@ static const struct meson_sar_adc_param meson_sar_adc_axg_param = {
 static const struct meson_sar_adc_param meson_sar_adc_g12a_param = {
        .has_bl30_integration = false,
        .clock_rate = 1200000,
-       .bandgap_reg = MESON_SAR_ADC_REG11,
        .regmap_config = &meson_sar_adc_regmap_config_gxbb,
        .resolution = 12,
        .disable_ring_counter = 1,
-       .has_reg11 = true,
        .adc_eoc = 1,
        .has_vref_select = true,
        .vref_select = VREF_VDDA,