drm/amdgpu: fix invalid fence handling in amdgpu_vm_tlb_flush

CPU based update doesn't produce a fence, handle such cases properly.

Fixes: d8a3f0a0348d ("drm/amdgpu: implement TLB flush fence")
Signed-off-by: Lang Yu <lang.yu@amd.com>
Reviewed-by: Christian König <christian.koenig@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>

diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_vm.c b/drivers/gpu/drm/amd/amdgpu/amdgpu_vm.c
index bf18fdec10d71f0e3f519092cd49161ff5ef9700..75740e08630d5022c2dec064b7a5e03479066688 100644 (file)
--- a/drivers/gpu/drm/amd/amdgpu/amdgpu_vm.c
+++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_vm.c
@@ -908,10 +908,12 @@ amdgpu_vm_tlb_flush(struct amdgpu_vm_update_params *params,
 {
        struct amdgpu_vm *vm = params->vm;
 
-       if (!fence || !*fence)
+       tlb_cb->vm = vm;
+       if (!fence || !*fence) {
+               amdgpu_vm_tlb_seq_cb(NULL, &tlb_cb->cb);
                return;
+       }
 
-       tlb_cb->vm = vm;
        if (!dma_fence_add_callback(*fence, &tlb_cb->cb,
                                    amdgpu_vm_tlb_seq_cb)) {
                dma_fence_put(vm->last_tlb_flush);