drm/i915/mtl: Add Wa_14019821291

This workaround is primarily implemented by the BIOS.  However if the
BIOS applies the workaround it will reserve a small piece of our DSM
(which should be at the top, right below the WOPCM); we just need to
keep that region reserved so that nothing else attempts to re-use it.

v2: Declare regs in intel_gt_regs.h (Matt Roper)

v3: Shift WA implementation before calculation of *base (Matt Roper)

v4:
-  Change condition gscpmi base to be fall in DSM range.(Matt Roper)

Signed-off-by: Dnyaneshwar Bhadane <dnyaneshwar.bhadane@intel.com>
Reviewed-by: Matt Roper <matthew.d.roper@intel.com>
Signed-off-by: Matt Roper <matthew.d.roper@intel.com>
Link: https://patchwork.freedesktop.org/patch/msgid/20231027195052.3676632-1-dnyaneshwar.bhadane@intel.com

diff --git a/drivers/gpu/drm/i915/gem/i915_gem_stolen.c b/drivers/gpu/drm/i915/gem/i915_gem_stolen.c
index 1a766d8e7ccecd43c05bb5908d24f294ecf9ff2c..8c88075eeab237a189d74c08b54f2441d182e5a0 100644 (file)
--- a/drivers/gpu/drm/i915/gem/i915_gem_stolen.c
+++ b/drivers/gpu/drm/i915/gem/i915_gem_stolen.c
@@ -386,6 +386,27 @@ static void icl_get_stolen_reserved(struct drm_i915_private *i915,
 
        drm_dbg(&i915->drm, "GEN6_STOLEN_RESERVED = 0x%016llx\n", reg_val);
 
+       /* Wa_14019821291 */
+       if (MEDIA_VER_FULL(i915) == IP_VER(13, 0)) {
+               /*
+                * This workaround is primarily implemented by the BIOS.  We
+                * just need to figure out whether the BIOS has applied the
+                * workaround (meaning the programmed address falls within
+                * the DSM) and, if so, reserve that part of the DSM to
+                * prevent accidental reuse.  The DSM location should be just
+                * below the WOPCM.
+                */
+               u64 gscpsmi_base = intel_uncore_read64_2x32(uncore,
+                                                           MTL_GSCPSMI_BASEADDR_LSB,
+                                                           MTL_GSCPSMI_BASEADDR_MSB);
+               if (gscpsmi_base >= i915->dsm.stolen.start &&
+                   gscpsmi_base < i915->dsm.stolen.end) {
+                       *base = gscpsmi_base;
+                       *size = i915->dsm.stolen.end - gscpsmi_base;
+                       return;
+               }
+       }
+
        switch (reg_val & GEN8_STOLEN_RESERVED_SIZE_MASK) {
        case GEN8_STOLEN_RESERVED_1M:
                *size = 1024 * 1024;

diff --git a/drivers/gpu/drm/i915/gt/intel_gt_regs.h b/drivers/gpu/drm/i915/gt/intel_gt_regs.h
index eecd0a87a64785be74a7c2d746879c1c4f71f279..9de41703fae58c3df763347f514c89fc62972c70 100644 (file)
--- a/drivers/gpu/drm/i915/gt/intel_gt_regs.h
+++ b/drivers/gpu/drm/i915/gt/intel_gt_regs.h
@@ -537,6 +537,9 @@
 #define XEHP_SQCM                              MCR_REG(0x8724)
 #define   EN_32B_ACCESS                                REG_BIT(30)
 
+#define MTL_GSCPSMI_BASEADDR_LSB               _MMIO(0x880c)
+#define MTL_GSCPSMI_BASEADDR_MSB               _MMIO(0x8810)
+
 #define HSW_IDICR                              _MMIO(0x9008)
 #define   IDIHASHMSK(x)                                (((x) & 0x3f) << 16)